CPU Core Verification Engineer for Next-Gen Compute

Socket.dev; Austin (TX); On-site; USD 120,000 - 180,000; Full time

Benefits offered by this job

AMD benefits at a glance

Job summary

AMD is seeking a CPU Core Design Verification Engineer in Austin to verify microarchitectural features of next-generation x86 cores. You will own portions of unit- or core-level verification using C++ and SystemVerilog, developing tests, checkers, and coverage with minimal supervision.

You will collaborate with RTL designers, architects, and other verification engineers to ensure intentional microarchitectural behavior is validated.

Qualifications

• Good understanding of computer architecture
• Experience using C++ and SystemVerilog to develop verification infrastructure for complex hardware designs
• Working knowledge of Digital Logic Design and RTL design concepts using Verilog
• Familiarity with constrained-random testing and coverage-driven verification
• Understanding of assembly-level programming and instruction execution at the ISA level
• Experience or familiarity with formal tools and/or functional verification tools by VCS, Cadence, Mentor Graphics
• Scripting knowledge (Python, Perl) is a plus

Responsibilities

• Collaborate with RTL designers, architects, and verification engineers to understand microarchitectural features, corner cases, and verification requirements
• Own the test plan, stimulus, checking, and functional coverage for an assigned portion of unit- or core-level verification
• Design, implement, and maintain C++-based and SystemVerilog-based testbench components, applying modular, reusable verification agent patterns
• Write and maintain SystemVerilog assertions and functional coverage models
• Debug simulation failures, independently drive root-cause analysis, and work cross-functionally to resolve RTL or testbench issues
• Drive functional and code coverage closure for your area, identify verification gaps, and improve stimulus and checking as needed
• Apply AI-assisted and agent-based development tools to improve verification productivity

Skills

C++

SystemVerilog

Verilog

Python

Education

Bachelors or Masters in Computer Engineering or Electrical Engineering

Tools

Cadence

Mentor Graphics

Job description

AMD is seeking a CPU Core Design Verification Engineer in Austin to verify microarchitectural features of next-generation x86 cores. You will own portions of unit- or core-level verification using C++ and SystemVerilog, developing tests, checkers, and coverage with minimal supervision.

You will collaborate with RTL designers, architects, and other verification engineers to ensure intentional microarchitectural behavior is validated.