A leading technology company is seeking a CPO High Speed I/O and Photonics Design Architect in Sunnyvale, CA. This role involves defining product specifications and strategies for low power, high density CPO solutions, designing and analyzing systems, and ensuring optimal performance. Ideal candidates should hold a Master's or Ph.D. and have over 5 years of experience in semiconductor roles, particularly in photonics development. A competitive salary is offered based on qualifications and experience.
Qualifications
Master's or PhD degree required for the role.
5+ years experience in semiconductor technology development.
Proven skills in photonics and collaborating with manufacturing partners.
Responsibilities
Define product specifications with the design team.
Design and analyze CPO systems for performance.
Optimize power efficiency and thermal characteristics.
Skills
Silicon photonics solutions development
Optical and electrical design
Signal integrity optimization
Thermal management
Education
Master’s or PhD in Mechanical Engineering, Electrical Engineering, Materials Science, or related field
Job description
CPO High Speed I/O and Photonics Design Architect
Location: Sunnyvale, CA
Base Pay Range
$190,000.00/yr - $270,000.00/yr
Job Description
Define CPO product specifications and strategy with the design team to achieve low power, high density, low cost, and high reliability CPO solutions.
Design, simulate, budget, and analyze CPO systems at both optical and electrical levels.
Optimize signal integrity, power efficiency, and thermal management in co-packaged optics.
Requirements
Master’s or PhD in Mechanical Engineering, Electrical Engineering, Materials Science, or related field.
Experience in developing and deploying silicon photonics solutions to the market.
Experience in developing photonics, including link budget analysis.
Over 5 years of experience in semiconductor technology development roles.
Over 5 years of experience collaborating with manufacturing partners, including suppliers, OSATs, and foundries.
In-depth knowledge of various packaging architectures, as well as EIC and PIC design architectures.