Co-Packaged Optics (CPO) Reliability Sr. Staff/Principal Engineer

MediaTek Research Lab Inc.; San Jose (CA); On-site; USD 188,000 - 301,000; Full time

Benefits offered by this job

Comprehensive health insurance

401K and savings plan

Parental leave

Vacation time

Sick Leave

Job summary

MediaTek Research Lab Inc. in San Jose, CA is seeking a Sr. Staff/Principal Engineer to lead reliability and qualification for co-packaged photonic and electronic systems. The ideal candidate will have over 8 years of experience in reliability engineering and a Master's or Ph.D. in a relevant field.

This role includes defining testing methodologies, statistical analysis, and collaboration with external partners. The salary range for this position is $188,000 to $301,000, and additional benefits are provided.

Qualifications

• 8+ years of experience in product qualification and reliability engineering.
• Deep understanding of III-V lasers and Silicon Photonic devices.
• Experience with Advanced Packaging schemes such as TSVs and micro-bumps.

Responsibilities

• Lead reliability assessment of co-packaged photonic and electronic systems.
• Define accelerated testing methodologies for complex thermal/mechanical interfaces.
• Collaborate with design teams to establish Design for Reliability (DfR).

Skills

Reliability Engineering

Statistical Analysis

Failure Analysis

Packaging Knowledge

Education

Master’s or Ph.D. in Materials Science or Electrical Engineering

Tools

JMP

Job description

Co-Packaged Optics (CPO) Reliability Sr. Staff/Principal Engineer

Category: Chip Design

Location: San Jose, CA

Experience: More than 8 Years Work Expe.

Job Description

We are seeking a high-caliber Co-Packaged Optics (CPO) Reliability Engineer to lead the reliability, qualification, and robustness assessment of next-generation co-packaged photonic and electronic systems. In this role, you will focus on the unique reliability challenges at the intersection of high-speed silicon switch ASICs and optical transport, driving qualification across the entire product Lifecycle. You will be responsible for defining accelerated testing methodologies, evaluating complex thermal/mechanical interfaces, and ensuring the seamless integration of optoelectronic components within advanced multi-die architectures.

• CPO Architecture Qualification: Architecture and execute comprehensive qualification plans at the module and system levels, ensuring strict compliance with GR-468 (Telcordia) and relevant JEDEC standards tailored for co-packaged environments.
• Advanced Packaging Reliability: Characterize and model the Reliability Failure Modes of Silicon / Packaging specifically targeting high-density 2.5D / 3D packaging, Multi-Chip-Modules (MCM), and ultra-dense electrical/optical interfaces.
• Component De-risking: Partner with design teams early in the NPI phase to establish Design for Reliability (DfR) and execute FMEA / DFMEA to mitigate risks associated with integrated Optical Engines, PIC (Photonic Integrated Circuits), and high-power III-V laser sources.
• Reliability Lifetime Modeling: Develop physics-of-failure and Reliability lifetime Modeling frameworks to evaluate wear-out mechanisms such as thermo-mechanical fatigue, electromigration, and optical degradation under mission-critical data center use conditions.
• Statistical Analysis & FIT Tracking: Utilize statistical software like JMP to analyze parametric drift, accelerated life testing (ALT) data, and calculate product FIT (Failures in Time) and MTBF metrics.
• Failure Analysis & RMA: Own root-cause failure analysis (FA) for qualification failures and field returns (RMA), leveraging advanced analytical tools to identify material, process, or design marginalities.
• Supply Chain Collaboration: Work closely with external ecosystems, including OSAT partners, contract manufacturers (CM), and foundry suppliers, to standardize test methodologies and audit factory-level quality controls.

Main Requirements and Qualifications

• Education: Master’s or Ph.D. in Materials Science, Electrical Engineering, Physics, or a related field with a focus on semiconductor reliability.
• Experience: 8+ years of experience in product qualification and reliability engineering, specifically within high-speed optoelectronics, silicon photonics, or advanced semiconductor packaging.
• Technical Expertise: Deep understanding of III-V lasers, Silicon Photonic devices, and high-density optical interconnects.
• Packaging Knowledge: Direct experience evaluating reliability risks in Advanced Packaging schemes, including TSVs, micro-bumps, and high-thermal-dissipation substrates used in Multi-Chip-Modules.
• Tools & Standards: Proficient in JMP for statistical life-data analysis (Weibull, lognormal distributions) and thoroughly well-versed in GR-468 qualification environments.
• Salary range: $188,000- $301,000
• Employee may be eligible for performance bonus, short and long term incentive programs. Actual total compensation will be dependent upon the individual's skills, experience and qualifications. In addition, MediaTek provides a variety of benefits including comprehensive health insurance coverage, life and disability insurance, savings plan, Company paid holidays, Sick Leave, Vacation time, Parental leave, 401K and more.
• MediaTek is an Equal Opportunity Employer that is committed to inclusion and diversity to all, regardless of age, ancestry, color, disability (mental and physical), exercising the right to family care and medical leave, gender, gender expression, gender identity, genetic information, marital status, medical condition, military or veteran status, national origin, political affiliation, race, religious creed, sex (includes pregnancy, childbirth, breastfeeding and related medical conditions), and sexual orientation.