Copy of Copy of Technical Program Manager - SoC Programs

TylSemi, Inc.; San Jose (CA); On-site; USD 180,000 - 260,000; Full time

Job summary

TylSemi is seeking a Technical Program Manager who sits at the intersection of silicon, supply chain, and customer success. You will own the operational thread that connects strategic initiatives to customers and semiconductor supply chains, ensuring engagements move from idea to silicon with precision.

This high-visibility, high-ownership role works directly with founders, customers, and ecosystem partners.

Qualifications

• 15+ years of technical program or project management experience in semiconductor or chiplet environments.
• Experience interfacing with ecosystem partners and managing tape-out schedules.
• Strong communication and program-tracking skills.

Responsibilities

• Manage all active customer engagements end-to-end from spec alignment through tape-out and volume shipment.
• Align with ecosystem partners including foundries, OSAT/packaging houses, EDA vendors, and IP partners.
• Translate customer requirements into internal program plans with owners and dates.
• Build and maintain program trackers, risk registers, and executive dashboards.
• Drive gate reviews and weekly program syncs across RTL/DV, physical design, and validation.
• Manage scoping and delivery timelines with technical and business teams.
• Identify and mitigate risks before they impact schedule.

Skills

Technical program management

Semiconductor domain knowledge

Chiplet/3D packaging familiarity

Communication skills

Stakeholder management

Tools

Program tracking tools

Spreadsheet trackers

Job description

Lead of IP, EDA and SoC ecosystem

TylSemi, Inc. San Jose, California, United States

About this position

About TylSemi, Inc.

The Opportunity

The AI infrastructure market is exploding. Every hyperscaler, every cloud provider, every AI company is building custom silicon. But they all face the same problem: how do you connect hundreds of chips, deliver clean power at scale, and move terabits of data without melting the package?

That's what we solve. TylSemi builds the chiplet infrastructure IP — the IO, power delivery, and interconnect building blocks — that makes AI/HPC systems actually work at scale.

This isn't a nice-to-have. It's the critical path.

Why Now

The Market Window

The semiconductor industry is going through its biggest architectural shift in 40 years:

• Moore's Law is dead. 2nm and beyond delivers marginal performance gains. The future is chiplets, not monolithic dies.
• Custom silicon is now mainstream. Google, Microsoft, Amazon, Meta, OpenAI — they're all designing their own ASICs. The $50B custom silicon market is growing 30% annually.
• IO and power are the bottleneck. Solve hard problems and provide something which is a category in itself.

Translation: We're entering the market at exactly the moment when every major AI/HPC player needs what we're building, and their alternatives are disappearing.

Culture & Team: How We Work

No Politics, No Bureaucracy

There are no layers, no approval chains, no corporate theater.

• If you have an idea, we test it. If it works, we ship it.
• No endless meetings, no PowerPoint presentations to convince middle management.

Remote-Friendly, Global Team

• US team: Bay Area preferred, but we hire the best people regardless of location
• India team: Building a world-class design center in Bangalore

Move Fast, Ship Real Products

We're not a research project. We have paying customers, committed capital, and aggressive timelines.

This is a company, not a lifestyle business. We're building to win.

The Ask

If you're reading this, you're probably comfortable. You have a good job at a stable company with all the benefits.

We're asking you to walk away from that and bet on us.

Here's why you should:

• The market is real. AI infrastructure spending is $200B+ annually and growing 40% YoY. Every hyperscaler needs what we're building.
• The team has done this before. We've built and exited semiconductor companies at scale. This isn't our first rodeo.
• The traction is de-risked. We have LOIs, strategic investors, and a clear path to revenue.
• The work is consequential. You're not optimizing someone's ad click-through rate. You're building the silicon infrastructure that powers AI.

This is the bet. Join us and build something that matters.

Or stay comfortable. No judgment.

But if you're the kind of person who wants to take the shot, we'd love to talk.

READY TO JOIN?

About the role

TylSemi is looking for a Technical Program Manager who can sit at the intersection of silicon, supply chain, and customer success. You will own the operational thread that connects our stretagic initiatives to customers and semiconductor supply chain — making sure every engagement moves with precision from idea to silicon.

This is a high-visibility, high-ownership role at a company in its earliest and most consequential stage. You will work directly with founders, customers, the leading semiconductor ecosystem players. No layers, no ambiguity about impact.

What you'll do

• Manage all active customer engagements end-to-end: from architectural spec alignment through tape-out, KGD testing, packaging, and volume shipment milestones
• Ensure alignment with ecosystem partners — including foundries, OSAT/packaging houses, EDA vendors (Synopsys, Cadence), and IP partners
• Translate customer requirements (silicon architecture, interface specs, package form factor, delivery schedules) into internal program plans with clear owners and dates
• Build and maintain program trackers, risk registers, and executive dashboards covering each engagement
• Drive gate reviews and weekly program syncs across internal RTL/DV, physical design, and validation teams
• Manage internal and external scoping and delivery timelines in coordination with technical and business teams
• Identify and elevate risks early; propose and implement mitigations before they become schedule threats

What you bring

• 15+ years of technical program or project management experience in semiconductor, custom silicon, or chiplet/advanced packaging environments
• Direct experience interfacing with ecosystem partners — chip development schedules, interdepencies on EDA and IP, tape-out schedules and silicon bringup timelines
• Familiarity with silicon fabrication, advanced packaging formats: CoWoS, InFO, 2.5D/3D integration, substrate/interposer-based assembly
• Technical fluency in SoC or chiplet design flows — enough to understand RTL milestones, DV sign-off, PD handoffs, and silicon bring-up phases without needing translation
• Strong communication skills — comfortable presenting program status and risk posture to internal and external stakeholders
• Proficiency with program tracking tools (and spreadsheet-based trackers); experience building program infrastructure from scratch is a plus
• Familiarity with key connectivity IPs UCIe, PCIe Gen 5/6/7+, or high-bandwidth D2D interconnect standards is a strong plus

Nice to Have to Shine

• Prior experience at a chiplet startup, merchant silicon company, or systems company
• Background in AI/ML infrastructure silicon — accelerators, network switches, CPO-enabled platforms
• Familiarity with IVR/PMIC integration challenges in advanced packaging
• Exposure to EDA infrastructure programs (SNPS/CDNS cloud flows)