Chief PCIe Silicon Architect & Engineering Leader

Altera

San Jose (CA)

On-site

USD 232,000 - 341,000

Full time

9 days ago
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Job summary

Altera in San Jose, California, seeks a Senior Director, Silicon Architecture and Design Engineering (PCIe) to lead our PCIe Center of Excellence and own the PCIe technology franchise across our programmable device portfolio, from multi-generation architecture and IP delivery through compliance and customer enablement.

You will drive a large silicon organization, steering end-to-end silicon programs and collaborating across architecture, software, systems, and manufacturing to meet demanding

Qualifications

  • Bachelor’s degree in Electrical/Computer Engineering or Computer Science with 15+ years silicon engineering experience.
  • 10+ years PCIe and high-speed I/O tech experience including architecture and silicon development.
  • Experience leading engineering managers and delivering PCIe features across the full silicon lifecycle.

Responsibilities

  • Lead and mentor a high-performing silicon engineering organization spanning design, SoC integration, and program execution.
  • Own delivery of complex FPGA, ASIC, and SoC products across the full silicon lifecycle.
  • Drive scalable design methodologies, KPI-based execution, and automation.
  • Own PCIe Center of Excellence and PCIe architecture across the stack.
  • Engage with customers, ecosystem and standards bodies to shape roadmaps.

Education

Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science
Master’s degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science

Tools

PCIe architecture

Job description

Altera in San Jose, California, seeks a Senior Director, Silicon Architecture and Design Engineering (PCIe) to lead our PCIe Center of Excellence and own the PCIe technology franchise across our programmable device portfolio, from multi-generation architecture and IP delivery through compliance and customer enablement.

You will drive a large silicon organization, steering end-to-end silicon programs and collaborating across architecture, software, systems, and manufacturing to meet demanding

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