Avionics Reliability Engineer, Space Hardware (All Levels)

Astrolab; Hawthorne (CA); Vor Ort; USD 137.000 - 196.000; Vollzeit

Benefits dieser Stelle

Equity ownership

Comprehensive health benefits

401(k) plan with match

Flexible PTO and parental leave

Home office set up reimbursement

Weekly lunch stipend

Zusammenfassung

Astrolab, The Lunar Operations Company, seeks an Avionics Design Reliability Engineer in Hawthorne, CA. You will ensure CLV-1’s avionics, RF, and power systems survive missions, collaborating across disciplines to embed reliability into the design and mitigate failures before they arise.

You will lead FMEA, architect design standards, and own risk reviews, translating technical risk into clear decisions while building robust verification approaches and guidelines for new hardware.

Qualifikationen

• Bachelor's degree in engineering or related field is required.
• 5+ years designing/analyzing hardware for high-reliability systems (space/aviation).
• Experience with reliability methods: FMEA, accelerated testing, Weibull analysis.

Aufgaben

• Lead FMEA for avionics, RF, and power systems.
• Architect and document design standards and test methodologies.
• Own change and risk reviews; translate risk into actionable decisions.
• Develop reliability limits, margins, and verification approaches for hardware.
• Mentor engineers on reliability methods and analysis techniques.

Kenntnisse

Reliability engineering

FMEA

Weibull analysis

DFX / Design for Excellence

Physics of Failure

Derating practices

Ausbildung

Bachelor's degree in Engineering or related technical discipline

Jobbeschreibung

Astrolab, The Lunar Operations Company, seeks an Avionics Design Reliability Engineer in Hawthorne, CA. You will ensure CLV-1’s avionics, RF, and power systems survive missions, collaborating across disciplines to embed reliability into the design and mitigate failures before they arise.

You will lead FMEA, architect design standards, and own risk reviews, translating technical risk into clear decisions while building robust verification approaches and guidelines for new hardware.