ATE Test Engineer - V93000/UF+ for IC Failure Analysis

Nvidia Corporation in; Santa Clara (CA); On-site; USD 132,000 - 253,000; Full time

Job summary

NVIDIA is seeking an ATE Test Engineer (Finance) to join its Integrated Circuit Defect Analysis team in Santa Clara. You will bridge design, automated test equipment, and IC failure analysis, developing tailored test equipment and software for PS5000 and UF+ platforms while co-developing test hardware and diagnostics.

Requires 5+ years with V93000 PS5000 and UF+, strong scripting (Python/C++/Perl), and experience in IC FA flows and yield analysis.

Qualifications

• B.S. or M.S. in Electrical Engineering or related technical field.
• 5+ years with Advantest V93000 PS5000 and Teradyne UltraFLEXplus.
• Proficient in Python, C++, or Perl for scripting and vector processing.
• Familiar with IC FA flows, failure isolation, yield analysis.

Responsibilities

• Port and develop test vectors, patterns, and software on Advantest V93000 PS5000 and Teradyne UF+ platforms.
• Convert design data into functional test patterns to reproduce IC failures.
• Collaborate with FA engineers, design teams, and technicians to translate FA steps into reproducible test flows.
• Improve turnaround by optimizing tester hardware bandwidth, signal integrity, and software flows.
• Design and validate custom test hardware for FA setups.

Skills

Advantest V93000 PS5000

Teradyne UltraFLEXplus

Python

C++

Perl

Education

B.S. in Electrical Engineering

M.S. in Electrical Engineering

Tools

SmarTEST 8 environment

IG-XL software

Job description

NVIDIA is seeking an ATE Test Engineer (Finance) to join its Integrated Circuit Defect Analysis team in Santa Clara. You will bridge design, automated test equipment, and IC failure analysis, developing tailored test equipment and software for PS5000 and UF+ platforms while co-developing test hardware and diagnostics.

Requires 5+ years with V93000 PS5000 and UF+, strong scripting (Python/C++/Perl), and experience in IC FA flows and yield analysis.