ATE Test Engineer - FA/IC Diagnostics (PS5000/UF+), Equity

NVIDIA; Santa Clara (CA); On-site; USD 132,000 - 253,000; Full time

Job summary

NVIDIA in Santa Clara, CA is seeking a Test Engineer for the Integrated Circuit Defect Analysis team. You will enable tailored test equipment and software for Advantest PS5000 and Teradyne UF+ platforms, working with the FA team to bridge design, ATE, and IC failure analysis.

Responsibilities include porting test vectors, converting design data into test patterns, collaborating with FA engineers, and prototyping custom hardware for FA setups.

Qualifications

• B.S. or M.S. in Electrical/Computer Engineering or equivalent.
• 5+ years with Advantest V93000 PS5000 and Teradyne UltraFLEXplus.
• Proficient in Python, C++, or Perl scripting and vector processing.

Responsibilities

• Port and develop test vectors on Advantest V93000 PS5000 and Teradyne UF+.
• Convert design data into functional test patterns to reproduce failures.
• Collaborate with FA engineers, design teams, and technicians to define test flows.
• Improve turnaround by optimizing tester bandwidth and software flows.
• Design and validate custom hardware for FA setups.

Skills

Python

C++

Perl

Automation scripting

Vector processing

Education

B.S. or M.S. in Electrical Engineering or Computer Engineering

Tools

Advantest V93000 (PS5000)

SmarTEST 8

Teradyne UltraFLEXplus (IG-XL)

PS5000 module

Probe cards / load boards

Job description

NVIDIA in Santa Clara, CA is seeking a Test Engineer for the Integrated Circuit Defect Analysis team. You will enable tailored test equipment and software for Advantest PS5000 and Teradyne UF+ platforms, working with the FA team to bridge design, ATE, and IC failure analysis.

Responsibilities include porting test vectors, converting design data into test patterns, collaborating with FA engineers, and prototyping custom hardware for FA setups.