ATE Test Engineer (Teradyne J750 Testing)

INFT Solutions, Inc; Dallas (TX); On-site; USD 90,000 - 120,000; Full time

Job summary

INFT Solutions, Inc. is seeking an ATE Test Engineer in Dallas to develop and debug test programs on Teradyne J750, collaborating with design engineers on characterization and bring-up.

You will support production release, yield improvement, and test time reduction initiatives while working with product, design, quality, and foundry teams in a growth-oriented engineering environment.

Qualifications

• Degree in Electronics / Electrical Engineering.
• 2-7 years of relevant Test Engineering experience preferred.
• Hands-on Teradyne J750 ATE experience required.
• Experience using bench instrumentation for IC characterization.
• Strong analytical and problem-solving skills.
• Excellent verbal and written communication skills; able to work independently.
• Willingness to be based in Dallas, TX.

Responsibilities

• Develop test programs for Digital, PMIC, RF & Mixed Signal on Bench and/or ATE (Teradyne J750).
• Partner with design engineers on first silicon debug, device characterization, test program bring-up, and production release.
• Debug digital vectors (JTAG/SCAN/ATPG/Functional/Mbist) and characterize devices across PVT.
• Characterize RF, PMIC, or Mixed Signal IP (ADC, DAC, PLL, etc.).
• Support test program hand-off, production release, yield improvement, and test time reduction initiatives.
• Collaborate closely with Product Engineering, Design Engineering, Quality Engineering, and Foundry Engineering teams.

Skills

Teradyne J750 experience

Bench instrumentation

Analog and digital electronics

Analytical problem solving

Independent work

Education

Bachelors in Electronics or Electrical Engineering

Tools

Teradyne J750

Job description

As an ATE Test Engineer, you will develop and debug test programs on Teradyne J750, work closely with design engineers on device characterization and test program bring-up, and support production release, yield improvement, and test time reduction initiatives.

What You'll Do

• Develop test programs for Digital, PMIC, RF & Mixed Signal products on Bench and/or ATE (Teradyne J750)
• Partner with design engineers on first silicon debug, device characterization, test program bring-up, and production release
• Debug digital vectors (JTAG/SCAN/ATPG/Functional/Mbist) and characterize devices across PVT (Process, Voltage, Temperature)
• Characterize RF, PMIC, or Mixed Signal IP (ADC, DAC, PLL, etc.)
• Support test program hand-off, production release, yield improvement, and test time reduction initiatives
• Collaborate closely with Product Engineering, Design Engineering, Quality Engineering, and Foundry Engineering teams

What You Bring

• Degree in Electronics / Electrical Engineering
• 2-7 years of relevant Test Engineering experience preferred
• H ands-on experience with Teradyne J750 ATE (required)
• Experience using bench instrumentation for IC characterization
• Solid knowledge of analog and digital electronicsStrong analytical and problem-solving skills with a hands-on lab mindset
• Excellent verbal and written communication skills; able to work independently
• Willingness to be based in Dallas, TX

What We Offer

• Opportunity to work on cutting-edge Digital, PMIC, RF & Mixed Signal silicon programs
• Direct collaboration with design and product engineering teams on first-silicon bring-up
• Exposure to industry-leading ATE platforms (Teradyne J750)
• A collaborative, growth-oriented engineering culture at a global test services leader