ATE Test Engineer - J750 Bring-Up & Characterization

Tessolve; Dallas (TX); On-site; USD 90,000 - 120,000; Full time

Job summary

Tessolve is seeking an ATE Test Engineer in Dallas, TX to support Digital, PMIC, RF & Mixed Signal programs on Teradyne J750 ATE platforms. You will partner with design engineers on first silicon bring-up, characterization and production release.

Responsibilities include developing test programs on J750, debugging vectors, and collaborating with Product, Design, Quality and Foundry teams to improve yield and reduce test time.

Qualifications

• Degree in Electronics or Electrical Engineering required.
• Hands-on experience with Teradyne J750 ATE is required.
• Experience with bench instrumentation for IC characterization and testing.

Responsibilities

• Develop test programs for Digital, PMIC, RF & Mixed Signal on Teradyne J750 or benches.
• Collaborate with design engineers on first silicon debug, characterization and production release.
• Debug digital vectors (JTAG/SCAN/ATPG/Mbist) and characterize devices across PVT.
• Characterize RF, PMIC, or mixed-signal IP (ADC, DAC, PLL, etc.).
• Support test program hand-off, production release, yield improvement, and test time reduction initiatives.
• Collaborate with Product, Design, Quality and Foundry Engineering teams.

Skills

Teradyne J750

JTAG/SCAN/ATPG

IC characterization

Analog & Digital Electronics

Lab troubleshooting

Communication skills

Education

Bachelor's degree in Electronics or Electrical Engineering

Tools

Bench instrumentation

Teradyne J750 tooling

Job description

Tessolve is seeking an ATE Test Engineer in Dallas, TX to support Digital, PMIC, RF & Mixed Signal programs on Teradyne J750 ATE platforms. You will partner with design engineers on first silicon bring-up, characterization and production release.

Responsibilities include developing test programs on J750, debugging vectors, and collaborating with Product, Design, Quality and Foundry teams to improve yield and reduce test time.