ATE Test Engineer

She Jobs; Sacramento (CA); On-site; USD 120,000 - 180,000; Full time

Job summary

She Jobs in Mountain View, CA is seeking an ATE Test Engineer to develop and debug ATE test programs for IP and SoC devices, and to perform IP-level characterization and validation.

You will execute functional tests including HSIO and DDR, work on SMT8/93K platforms, and translate functional models into production test vectors while collaborating with design and product teams. Strong hardware test background and teamwork are essential.

Experience with mixed-signal testing is a plus.

Qualifications

• Hands-on experience with ATE platforms (e.g., Advantest 93K, SMT8) required.
• Strong background in digital test methodologies.
• Experience with HSIO, DDR, or similar high-speed interfaces.
• Familiarity with vector translation and functional model testing.
• Bachelor's or Master's degree in Electrical/Electronics Engineering.

Responsibilities

• Develop and debug ATE test programs for IP and SoC devices.
• Perform IP-level characterization and validation.
• Execute functional tests including HSIO, DDR, and vector-based testing.
• Work on SMT8/93K or similar ATE platforms.
• Support translation of functional models into production test vectors.
• Collaborate with design, DV, and product engineering teams.
• Perform debug, failure analysis, and test optimization.
• Contribute to Digital and AMS block testing.

Skills

Digital test methods

HSIO & DDR testing

Vector translation

Test program development

Team collaboration

Education

Bachelor's or Master's degree in Electrical/Electronics Engineering

Tools

Advantest 93K

SMT8

Job description

ATE Test Engineer

Location: Mountain View, CA-Onsite work

Key Responsibilities:

• Develop and debug ATE test programs for IP and SoC devices.


• Perform IP-level characterization and validation.


• Execute functional tests including HSIO, DDR, and vector-based testing.


• Work on SMT8/93K or similar ATE platforms.


• Support translation of functional models into production test vectors.


• Collaborate with design, DV, and product engineering teams.


• Perform debug, failure analysis, and test optimization.


• Contribute to Digital and AMS block testing.

Required Qualifications:

• Hands-on experience with ATE platforms (e.g., Advantest 93K, SMT8).


• Strong background in digital test methodologies.


• Experience with HSIO, DDR, or similar high-speed interfaces.


• Familiarity with vector translation and functional model testing.


• Bachelor's or Master's degree in Electrical/Electronics Engineering.

Preferred:

• Experience with mixed-signal (AMS) testing.


• Exposure to IP-level or SoC characterization flows.