ASIC Verification Engineer — High-Speed Interconnect & HDL

Broadcom; United States; On-site; USD 101,000 - 162,000; Full time

Benefits offered by this job

Discretionary annual bonus

Equity grant

Medical, dental and vision plans

Job summary

Broadcom in the United States is seeking an ASIC Verification Engineer to join the HSIP group. You will work with cross-functional teams across marketing, architecture, firmware, and layout on the full product development cycle from definition to production.

You will develop verification environments using SystemVerilog UVM, understand IEEE Ethernet protocols, and participate in block- and chip-level verification, while creating scripts to improve efficiency and quality.

Qualifications

• Bachelors in Engineering and 5+ years of related experience or Masters degree in Engineering and 3+ years of related experience or PhD and no experience
• Design/Verification experience, or equivalent experience
• Logic design, Electronic circuit design and related coursework to provide a broad background in the area of ASIC design and verification
• Proficiency with HDL language such as Verilog, SystemVerilog or VHDL is a must
• Proficiency with C/C++ programming language and hands-on exposure to Object Oriented Programming is a big plus
• Proficiency with scripting in Python, PERL, TCL is a big plus
• Self-motivated, good communicator, quick learner and good team player
• Display positive attitude and demonstrate flexibility in day-to-day work

Responsibilities

• Develop thorough understanding of IEEE Ethernet protocols.
• Understand chip architecture, microarchitecture and design specification.
• Develop advanced verification environment and testbench components in SystemVerilog UVM.
• Participate in block level and chip level verification tasks.
• Infrastructure work including developing scripts and tools for efficiency and quality improvements.

Skills

Self-motivated

Good communicator

Fast learner

Team player

Education

Bachelor's in Engineering

Master's in Engineering

PhD

Tools

Verilog

SystemVerilog

VHDL

C/C++

Python

PERL

TCL

Job description

Broadcom in the United States is seeking an ASIC Verification Engineer to join the HSIP group. You will work with cross-functional teams across marketing, architecture, firmware, and layout on the full product development cycle from definition to production.

You will develop verification environments using SystemVerilog UVM, understand IEEE Ethernet protocols, and participate in block- and chip-level verification, while creating scripts to improve efficiency and quality.