ASIC & FPGA Design Engineer Stf – E4

Anysilicon; Orlando (FL); Hybrid; USD 120,000 - 180,000; Full time

Job summary

Lockheed Martin in Orlando, FL is seeking an ASIC & FPGA Design Engineer to lead digital development of RF-sensor platforms and define digital architectures for radar systems.

You will translate MATLAB/Simulink models into synthesizable RTL, perform verification with testbenches, and optimize RFSoC/Versal designs while collaborating with cross-functional teams. Join a mission-critical team in a defense setting.

Qualifications

• B.S. or M.S. in Electrical/Computer Engineering or related field.
• Experience with AMD RFSoC and Versal families.
• Proficiency in VHDL, Verilog, or SystemVerilog.
• Experience with Vivado HLS and converting Simulink/MATLAB models into synthesizable code.
• Experience with FPGA simulation tools such as Synopsys VCS.
• Proficiency in timing analysis, clock-domain crossing, and IP integration.
• Experience implementing RF-DSP algorithms in hardware.

Responsibilities

• Lead the digital development of RF-sensor platforms.
• Define digital architectures to meet radar/RF-sensor performance, power, and timing requirements.
• Convert MATLAB/Simulink models into synthesizable RTL and high-level synthesis (Vitis HLS) code.
• Write, simulate, and verify RTL and HLS implementations using self-checking testbenches.
• Integrate custom and third-party IP blocks, managing clock-domain crossing and timing-closure challenges.
• Perform place-and-route, timing analysis, and optimization for RFSoC/Versal platforms.
• Conduct design reviews and maintain configuration control in version-control systems.
• Collaborate with algorithm developers, hardware engineers, and software teams for system integration.
• Mentor junior engineers and foster an inclusive team culture.
• Support system-level validation, debugging, and board-level testing.

Skills

RFSoC/Versal experience

FPGA design and verification

Leadership & collaboration

Programming in C/C++/Python

Education

B.S./M.S. in Electrical/Computer Engineering

Tools

Vivado HLS

Synopsys VCS

MATLAB/Simulink to RTL

Job description

Lockheed Martin is seeking an ASIC & FPGA Design Engineer to join their Missiles and Fire Control department in Orlando, FL. This role involves leading the digital development of RF-sensor platforms, creating FPGA-based architectures for defense systems, and collaborating with various teams to ensure high-performance digital solutions for mission-critical applications.

Responsibilities

• Lead the digital development of RF-sensor platforms.
• Define digital architectures to meet radar/RF-sensor performance, power, and timing requirements.
• Convert MATLAB/Simulink models into synthesizable RTL and high-level synthesis (Vitis HLS) code.
• Write, simulate, and verify RTL and HLS implementations using self-checking testbenches.
• Integrate custom and third-party IP blocks, managing clock-domain crossing and timing-closure challenges.
• Perform place-and-route, timing analysis, and optimization for RFSoC/Versal platforms.
• Conduct design reviews and maintain configuration control in version-control systems.
• Collaborate with algorithm developers, hardware engineers, and software teams for system integration.
• Mentor junior engineers and foster an inclusive team culture.
• Support system-level validation, debugging, and board-level testing.

Qualifications

• B.S. or M.S. in Electrical/Computer Engineering or a related field.
• Experience with AMD RFSoC and Versal families.
• Proficiency in VHDL, Verilog, or SystemVerilog.
• Experience with Vivado HLS and converting Simulink/MATLAB models into synthesizable code.
• Experience with FPGA simulation tools such as Synopsys VCS.
• Proficiency in timing analysis, clock-domain crossing, and IP integration.
• Experience implementing RF-DSP algorithms in hardware.

Skills

• Excellent communication and collaboration skills.
• Leadership abilities.
• Knowledge of software programming languages such as C, C++, or Python.