RFSoC FPGA Design Engineer for Radar RF Systems

Lockheed Martin; Orlando (FL); On-site; USD 121,000 - 224,000; Full time

Benefits offered by this job

Medical, Dental, Vision benefits

Flexible work arrangements

401(k) match

Job summary

Lockheed Martin Missiles and Fire Control in Orlando, FL seeks an FPGA Design Engineer to lead digital development for RF-sensor platforms on AMDRFSoC and Versal devices. You will convert MATLAB/Simulink models into synthesizable RTL via Vitis HLS, write and verify RTL/HLS, integrate IP blocks, manage clock-domain crossing and timing closure, and mentor junior engineers while collaborating with algorithms, hardware, and software teams.

This role requires U.S.

Qualifications

• B.S. or M.S. in Electrical/Computer Engineering or related field.
• Proficiency in VHDL, Verilog, or SystemVerilog.
• Experience converting Simulink/Matlab models into synthesizable code using Vivado HLS.
• Experience with FPGA simulation tools such as Synopsys VCS.
• Proficiency with timing analysis, clock-domain crossing, and IP integration.
• Strong communication and collaboration skills.

Responsibilities

• Define digital architectures meeting radar/RF-sensor performance, power, and timing requirements.
• Convert MATLAB/Simulink models into synthesizable RTL via HLS and RTL code (VHDL/Verilog/SystemVerilog).
• Write, simulate, and verify RTL and HLS implementations with self-checking testbenches and coverage.
• Integrate IP blocks and manage clock-domain crossing and timing-closure for RFSoC/Versal.
• Perform place-and-route and timing analysis to achieve timing closure.
• Conduct design reviews, deliver documentation, and maintain configuration control.
• Collaborate with algorithm, hardware, and software teams for end-to-end integration.
• Lead mentorship for junior engineers and foster an inclusive, innovative culture.
• Support system-level validation and board-level testing.

Skills

VHDL

Verilog

SystemVerilog

Vivado HLS

VCS

Timing analysis

Clock-domain crossing

IP integration

C

C++

Python

Education

B.S. or M.S. in Electrical/Computer Engineering or related field

Tools

Vivado

MATLAB/Simulink

Job description

Lockheed Martin Missiles and Fire Control in Orlando, FL seeks an FPGA Design Engineer to lead digital development for RF-sensor platforms on AMDRFSoC and Versal devices. You will convert MATLAB/Simulink models into synthesizable RTL via Vitis HLS, write and verify RTL/HLS, integrate IP blocks, manage clock-domain crossing and timing closure, and mentor junior engineers while collaborating with algorithms, hardware, and software teams.

This role requires U.S.