Senior ASIC Verification Engineer, LEO Satellite SOCs

Amazon; Sunnyvale (CA); On-site; USD 183,000 - 248,000; Full time

Benefits offered by this job

Health insurance

401(k) matching

Paid time off

Parental leave

Life & AD&D insurance

Job summary

Amazon Kuiper Manufacturing Enterprises LLC in Sunnyvale seeks a senior verification engineer to define and implement SOC verification for wireless and satellite communications. You will develop test benches, run regressions, and ensure RTL accuracy against Matlab/C references.

Candidates should have 7+ years in verification, 5+ years in UVM, C/C++, scripting, and familiarity with SystemC and DPI-C. The team emphasizes automated, scalable verification across FPGA and emulation platforms.

Qualifications

• Master's or Ph.D. in Electrical Engineering or related field.
• 7+ years in verification, preferably in communication systems.
• 5+ years in UVM, C/C++ and scripting.

Responsibilities

• Implement a state-of-the-art verification environment to test RTL against reference Matlab/C models.
• Develop detailed test plans and write tests, run regressions, collect coverage, and report progress to the program.
• Write tests in C/C++ to execute on embedded CPU.
• Develop tests for FPGA and emulation platforms.
• Run formal verification of complex blocks to ensure functional correctness.
• Work with design and communication systems teams and participate in system-level verification using test benches (UVM, SystemC, DPI-C).
• Develop a highly automated environment to run regressions for builds and database organization.

Skills

UVM

C/C++

SystemC

Matlab

Scripting

Education

Master's or Ph.D. in Electrical Engineering

Tools

DPI-C

Job description

Amazon Kuiper Manufacturing Enterprises LLC in Sunnyvale seeks a senior verification engineer to define and implement SOC verification for wireless and satellite communications. You will develop test benches, run regressions, and ensure RTL accuracy against Matlab/C references.

Candidates should have 7+ years in verification, 5+ years in UVM, C/C++, scripting, and familiarity with SystemC and DPI-C. The team emphasizes automated, scalable verification across FPGA and emulation platforms.