ASIC Engineer [hybrid]

Anysilicon; San Jose, Northern (CA, KY); Hybrid; USD 140,000 - 190,000; Full time

Job summary

Cisco is seeking an experienced ASIC Engineer to join a hybrid team defining, designing, and verifying ASICs and subsystems for Cisco platforms. You will collaborate across disciplines to meet power, performance, and area goals for high-volume products.

Responsibilities include guiding RTL changes, developing test plans and benches, and ensuring robust physical design and signal integrity for integration across multiple blocks.

Qualifications

• Bachelor's degree with 5 years of related experience, or Master's degree with 3 years, or PhD with no prior experience.

Responsibilities

• Collaborate on the definition and design of high-performance ASICs.
• Oversee project code and own complex code, debugging as necessary.
• Document functional and user specifications for code.
• Complete block-level flow from block specification to tapeout.
• Contribute to the resolution of block-level issues.
• Write and execute test plans and test benches for analog/mixed signal products.
• Lead design verification activities and reviews for owned code.
• Own the physical design of multiple blocks or one high-complexity block.
• Guide RDL block owners on RTL changes.
• Drive signal and power integrity for ASIC integration.
• Analyze and validate subsystems.

Skills

ASIC design

ASIC verification

Debugging

Test benches

Analog/mixed signal

Physical design

Signal integrity

Education

Bachelor's degree

Master's degree

PhD

Job description

Cisco is seeking an experienced ASIC Engineer to join a hybrid team focused on defining, designing, and verifying ASIC and ASIC subsystems for various Cisco platforms. The role involves collaboration within a multi-disciplined engineering team to achieve power, performance, and area goals for high-volume products. The engineer will contribute to the design and implementation processes, ensuring high quality and efficiency in ASIC development.

Responsibilities:

• Collaborate on the definition and design of high-performance ASICs.
• Oversee project code and own complex code, debugging as necessary.
• Document functional and user specifications for code.
• Complete block-level flow from block specification to tapeout.
• Contribute to the resolution of block-level issues.
• Write and execute test plans and test benches for analog/mixed signal products.
• Lead design verification activities and reviews for owned code.
• Own the physical design of multiple blocks or one high-complexity block.
• Guide RDL block owners on RTL changes.
• Drive signal and power integrity for ASIC integration.
• Analyze and validate subsystems.

Qualifications:

• Bachelor's degree with 5 years of related experience, or
• Master's degree with 3 years of related experience, or
• PhD with no prior experience.

Skills:

• Expertise in ASIC design and verification processes.
• Strong debugging skills in complex code environments.
• Proficiency in writing and executing test plans and test benches.
• Experience with analog/mixed signal products.
• Ability to lead design verification activities and code reviews.
• Knowledge of physical design and signal integrity principles.