ASIC Engineer Early Career Intern

Amazon

Seattle (WA)

On-site

USD 116,000 - 134,000

Full time

14 days+

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Benefits offered by this job

401(k) matching
Mental health support
Medical advisory services

Job summary

New Grad in Seattle is seeking a student graduating by May 2027 to design and implement RTL for digital logic blocks using Verilog or SystemVerilog. You will contribute to verification environments and collaborate across teams to bring features to silicon.

The program pays a yearly salary of $116,100 in Seattle/Austin or $133,600 in Cupertino, with benefits including 401(k) matching, mental health support, and medical advisory services.

Qualifications

  • Students graduating by May 2027 in engineering or computer science fields.
  • Knowledge of digital design concepts like sequential logic and timing.
  • Familiarity with hardware description languages such as Verilog, SystemVerilog, or VHDL.

Responsibilities

  • Design and implement RTL for digital logic blocks using Verilog or SystemVerilog.
  • Develop verification environments to validate design functionality and coverage.
  • Support synthesis, timing analysis, and physical design flows.
  • Collaborate with cross-functional teams to take features from specification to silicon.

Skills

Digital design concepts
Sequential logic
Timing

Education

Bachelor's in Engineering/CS (in progress)

Tools

Verilog
SystemVerilog
VHDL

Job description

What you'll do:
  • Design and implement RTL for digital logic blocks using Verilog or SystemVerilog.
  • Develop verification environments to validate design functionality and coverage.
  • Support synthesis, timing analysis, and physical design flows.
  • Collaborate with cross-functional teams to take features from specification to silicon.
What they're looking for:
  • Students graduating by May 2027 in engineering or computer science fields.
  • Knowledge of digital design concepts like sequential logic and timing.
  • Familiarity with hardware description languages such as Verilog, SystemVerilog, or VHDL.
Pay and perks:
  • Annual salary: $116,100 in Seattle or Austin; $133,600 in Cupertino.
  • Includes 401(k) matching, mental health support, and medical advice services.
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