ASIC Design Verification Engineer, Google TPU

Google LLC; Sunnyvale (CA); On-site; USD 138,000 - 197,000; Full time

Job summary

Google is seeking an ASIC Design Verification Engineer to shape the TPU hardware verification effort in Sunnyvale, CA. You will verify complex digital designs and drive TPU architecture integration within AI/ML systems, contributing to Google's cutting-edge AI hardware.

In this role you will perform direct verification on active projects and develop verification strategies using SystemVerilog/Verilog, UVM, and constrained-random techniques to ensure robust tape-out readiness.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, CS or related field.
• 4 years of experience with design verification.
• Experience with SystemVerilog/Verilog.

Responsibilities

• Plan the verification of complex digital design blocks by understanding the design specification and interacting with design engineers to identify important verification scenarios.
• Identify and write all types of coverage measures for stimulus and corner cases.
• Debug tests with design engineers to deliver functionally correct design blocks.
• Close coverage measures to identify verification holes and to show progress towards tape-out.
• Create a constrained-random verification environment using SystemVerilog and UVM.

Skills

SystemVerilog/Verilog

Design verification

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field

Tools

SystemVerilog/Verilog

Job description

Share ASIC Design Verification Engineer, Google TPU

corporate_fare Google place Sunnyvale, CA, USA

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
  
• 4 years of experience with design verification.
• Experience with SystemVerilog/Verilog.

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
  
• 6 years of experience with silicon design verification.
  
• Experience with industry-standard simulators, revision control systems and regression systems.
• Experience contributing across the entire design and verification life cycle.
  
• Knowledge of ASIC standard interfaces.

About the job

In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

As an ASIC Design Verification Engineer, you will use design and verification expertise to perform direct verification in active projects using problem-solving skills.

The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.

We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.

Individual pay is determined by factors including job-related skills, experience, and relevant education or training.

About the job

In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

As an ASIC Design Verification Engineer, you will use design and verification expertise to perform direct verification in active projects using problem-solving skills.

The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.

We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.

Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $138000 - $197000 (USD) + 15% bonus target + equity + benefits

• Plan the verification of complex digital design blocks by understanding the design specification and interacting with design engineers to identify important verification scenarios.
  
• Identify and write all types of coverage measures for stimulus and corner cases.
• Debug tests with design engineers to deliver functionally correct design blocks.
  
• Close coverage measures to identify verification holes and to show progress towards tape-out.
• Create a constrained-random verification environment using SystemVerilog and UVM.

Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents‑to‑be, criminal histories consistent with legal requirements, or any other basis protected by law. See also Google's EEO Policy , Know your rights: workplace discrimination is illegal , Belonging at Google , and How we hire .

Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.

Equity is granted exclusively and discretionarily by Alphabet Inc. on the basis of an agreement concluded between you and Alphabet Inc. Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not guaranteed, are discretionary, are subject to approval by the Alphabet Inc. board of directors or its delegate, the terms of the relevant Alphabet Inc. stock plan, and your grant agreement. They have no impact on statutory payments. Current or past grants do not confer an acquired right.