ASIC Design Engineer II

Ambarella; Northern (KY); Hybrid; USD 130,000 - 160,000; Full time

Job summary

Ambarella seeks an ASIC Design Engineer II to design video processing cores and accelerators using Verilog and SystemVerilog. You will contribute to RTL, timing closure, and verification, collaborating with a multidisciplinary team to bring high-performance edge solutions to market.

This role offers growth opportunities in autonomous cameras and smart devices, with a base pay range of $130,000 to $160,000 and comprehensive benefits. On-site collaboration at the US HQ is expected.

Qualifications

• Master's degree in Electrical, Electronics, or Computer Engineering.
• 0–5 years of relevant experience.
• Strong understanding of computer architecture and VLSI design principles.
• Proficiency in Verilog/SystemVerilog and Perl.

Responsibilities

• Design and implement video processing cores, accelerators, and memory subsystems using Verilog and SystemVerilog.
• Perform logic design, implementation, and verification.
• Synthesize and optimize RTL for performance, area, and power.
• Collaborate with verification team to address coverage gaps.

Skills

Verilog

SystemVerilog

Perl

VLSI design

Education

Master's degree in Electrical/Electronics/Computer Engineering

Tools

RTL Synthesis Tools

Job description

## ASIC Design Engineer IIApply: US Headquarters: Full time: Posted Today: JR100385## AI Vision Processors For Edge Applications### *Our solutions make cameras smarter by extracting valuable data from high-resolution video streams.***Job Description****Job Description****Key Responsibilities:**Position Responsibilities:Design and implement video compression, image processing, vector processing, neural network accelerators, processor cores, and memory subsystems using Verilog and SystemVerilog. Perform logic design, implementation, and verification utilizing Verilog, SystemVerilog, and relevant programming and scripting languages. Synthesize and optimize RTL for performance, area, and power efficiency. Develop and enhance front-end design methodologies and tool flows. Contribute to chip bring-up and validation efforts. Analyze code and functional coverage metrics, and collaborate with the verification team to identify and address coverage gaps.Qualifications:Master’s degree in Electrical, Electronics, or Computer Engineering, with 0–5 years of relevant experience. Solid understanding of computer architecture, logic design, and VLSI design principles. Proficiency in SystemVerilog, Verilog, and Perl. Familiarity with design verification methodologies and functional coverage concepts. Experience with scripting languages and the ability to write assembly language programs. Strong communication skills and a collaborative, team-oriented mindset. Demonstrated problem-solving skills and analytical thinking. Knowledge of logic synthesis and timing closure is a plus.**Why Join Us?*** Work on industry-leading products in an innovative and collaborative environment.* Make a direct impact on technologies used in autonomous vehicles, smart cameras, and more.* Competitive compensation, excellent benefits, and career development opportunities.The base range is $130,000 -$160,000. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The successful candidate will have the opportunity to convert to a full-time regular position. We also offer new-hire RSU grants and the opportunity for annual RSU grants, as well as other highly competitive benefits. Be a part of something extraordinary.