San Jose (CA)
On-site
USD 120,000 - 160,000
Full time
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Job summary
A leading company in micro-architecture development seeks a qualified engineer for algorithmic computation engine development and validation. Ideal candidates will possess strong Verilog and System Verilog skills, along with a background in DSP algorithms. This role requires effective communication and teamwork, contributing to innovative projects while directly interacting with clients.
Qualifications
- M.S. in Electrical or Computer Engineering with 5+ years of industry experience.
- Experience with Verilog and System Verilog is essential.
- Knowledge of DSP algorithms and Embedded Systems is a plus.
Responsibilities
- Develop micro-architectures and algorithms, writing documentation for client presentations.
- Conduct RTL development, synthesis, lint, and CDC checks.
- Collaborate with customers to troubleshoot and debug performance issues.
Skills
Verilog
System Verilog
C programming
DSP algorithm
Embedded Systems
Processor architecture
Teamwork
Effective communication
Education
M.S. in Electrical Engineering
M.S. in Computer Engineering
Responsibilities:
- IP and/or chip level micro-architectures, implementation, and validation
- Develop algorithmic computation engines, NAND memory controller, and so on
- Write up micro-architecture and design document and be able to present to customers
- Develop RTL, perform synthesis, lint and CDC check
- Working with customers to trouble shooting, debug, and tune system performance
Requirements:
- M.S. Electrical Engineering or Computer Engineering with 5+ years of industry experience
- Proven experience of Verilog, System Verilog and C programming
- Knowledge of DSP algorithm including AES, Hash, ECC codec, data compression is a big plus
- Knowledge of Embedded Systems and processor architecture is a plus
- Demonstrated ability to resolve customer issues and deliver timely results
- Teamwork spirit and effective communication skills