Analog/Mixed-Signal IC Design Engineer – Power Management

MaC VC

San Diego (CA)

On-site

USD 146,000 - 218,000

Full time

6 days ago
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Job summary

Qualcomm Technologies, Inc. is seeking an experienced senior IC design engineer to oversee architecture, verification, and documentation for CMOS analog/mixed-signal blocks including data converters and PLLs.

You will drive design reviews, coordinate with layout teams, and define verification plans to ensure power, performance, and functionality targets are met. The role requires 5+ years of analog/mixed-signal IC design experience and proficiency with Cadence, SPICE, MATLAB, and Verilog/VHDL.

Qualifications

  • Bachelor's Degree in Electrical Engineering or higher with relevant analog/mixed-signal IC design experience.
  • Experience with CMOS FinFET/nanometer processes and mixed-signal verification is required.

Responsibilities

  • Define and oversee architecture, verification, and documentation for IP/block development.
  • Coordinate with layout teams for block-level layout and silicon evaluation.
  • Define verification plans and run simulations to meet power, performance targets.
  • Draft clear technical documentation and design descriptions for complex projects.
  • Collaborate with internal/external users and vendors to align requirements.

Skills

Analog/Mixed-Signal IC design
Verification planning
Design reviews
Layout coordination

Education

Bachelor's Degree in Electrical Engineering
Master's Degree in Electrical Engineering
PhD in Electrical Engineering

Tools

Cadence
SPICE
MATLAB
Verilog/VHDL

Job description

Qualcomm Technologies, Inc. is seeking an experienced senior IC design engineer to oversee architecture, verification, and documentation for CMOS analog/mixed-signal blocks including data converters and PLLs.

You will drive design reviews, coordinate with layout teams, and define verification plans to ensure power, performance, and functionality targets are met. The role requires 5+ years of analog/mixed-signal IC design experience and proficiency with Cadence, SPICE, MATLAB, and Verilog/VHDL.

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