Analog/Mixed Signal ASIC Design Engineer

Qualcomm

San Diego (CA)

On-site

USD 115,600 - 173,400

Full time

14 days+
Application generator

An application made for this job — a tailored resume and cover letter that speak straight to the posting.

Get past ATS filters

Benefits offered by this job

Competitive annual discretionary bonus
RSU grants
Comprehensive benefits package

Job summary

A leading technology firm in San Diego seeks talented analog integrated circuit designers for the QCT Mixed-Signal IP design team. The role involves developing high-performance and low-power mixed-signal IPs for cutting-edge applications. Ideal candidates will possess a Master’s or Bachelor's degree in engineering, with demonstrated experience in analog design and ASIC tools. This position offers competitive compensation and a comprehensive benefits package.

Qualifications

  • Master's degree in Electrical Engineering or related field preferred.
  • 2+ years of experience with analog or mixed-signal integrated circuit design.
  • Experience with ASIC design tools and analog IPs is a plus.

Responsibilities

  • Develop mixed-signal IP including architecture definition and design partitioning.
  • Perform schematic capture and circuit simulations.
  • Collaborate with cross-functional teams on design implementation.

Skills

Analog circuit design
Cadence Virtuoso
ASIC design tools
Matlab
Python

Education

Master's degree in Engineering or related field
Bachelor's Degree in Electrical Engineering
PhD in Electrical Engineering or related field

Tools

CADENCE
SPICE
MATLAB
Verilog/VHDL

Job description

Company

Qualcomm Technologies, Inc.

Job Area

Engineering Group, Engineering Group > Analog Mixed Signal Design

General Summary

QCT Mixed-Signal IP (MSIP) design team is looking for talented analog integrated circuit designers at various levels to help with designing high-performance and low-power mixed-signal IPs (SerDes, DDR, PLL, DAC, ADC, sensors, etc.) in advanced silicon process technologies. These are widely used in Qualcomm’s SOCs and RF transceiver products targeted for 5G, AI/ML, compute, and automotive applications. MSIP design team consists of architects, analog/mixed signal and digital designers, protocol and signal processing experts, and algorithm designers, and we are looking for new talents in the area of analog circuit design for our SOCs.

Responsibilities
  • Work in our MSIP analog design team to develop various mixed-signal IP above including architecture definition, and analog/digital design partitioning and schematic design.
  • Schematic capture and circuit simulations in the Cadence Virtuoso tool suite.
  • Work with cross functional teams (i.e. layout and digital teams) on design implementation, verification and IP delivery to SOC customers.
  • Work with product test teams for post-silicon verification, bringup, debug, and production support.
Required Qualifications for this Role
  • Master's degree in Engineering or related field.
  • Demonstrated interest in analog circuit design by course selections and/or work experience.
  • Experience working with ASIC design tools such as Cadence Virtuoso.
Preferred Qualifications
  • Several years of industry experience in the area of analog integrated circuit/system design.
  • Experience as an analog designer of mixed-signal IPs, such as SerDes, DDR, PLL, DAC, ADC, sensors.
  • Familiar with Matlab and Python and good understanding of architecture, system and integration aspects for mixed-signal.
  • Good understanding of design for yield and production challenges.
  • Good understanding of Signals and Systems, Sampled Domain signal processing a plus.
Minimum Qualifications
  • Bachelor's Degree in Electrical Engineering with 2+ years of experience with analog or mixed-signal integrated circuit design in nanometer planar CMOS or FinFET and 2+ years of ASIC design, verification, or related work experience.
  • Master's degree in Electrical Engineering or related field and 2+ years of ASIC design, verification, or related work experience.
  • PhD in Electrical Engineering or related field.
  • 2+ years of experience using one or more design tools (e.g., CADENCE, SPICE, MATLAB, and/or Verilog/VHDL).
EEO Statement

Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

To All Staffing and Recruiting Agencies

Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies.

Pay range and Other Compensation & Benefits

$115,600.00 - $173,400.00

The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link.

Contact

If you would like more information about this role, please contact Qualcomm Careers.

Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

Analog Mixed Signal/Power Management Design Engineer
Analog Mixed Signal/Power Management Design Engineer

Qualcomm • San Diego (CA)

On-site
USD 142,000 - 214,000
Annual discretionary bonus
Opportunity for RSU grants
Comprehensive benefits package
Digital ASIC Design Engineer for Mixed-Signal IPs
Digital ASIC Design Engineer for Mixed-Signal IPs

Qualcomm • San Diego (CA)

On-site
USD 115,000 - 174,000
Discretionary bonus program
Annual RSU grants
Comprehensive benefits package
ASIC/RTL Design Engineer for High-speed Interfaces
ASIC/RTL Design Engineer for High-speed Interfaces

Nutanix • San Diego (CA)

On-site
USD 140,000 - 210,000
ASIC/RTL Design Engineer for High-speed Interfaces
ASIC/RTL Design Engineer for High-speed Interfaces

Qualcomm • San Diego (CA)

On-site
USD 140,000 - 210,000
Analog/Mixed Signal ASIC Design Engineer
Analog/Mixed Signal ASIC Design Engineer

Nutanix • San Diego (CA)

On-site
USD 99,000 - 148,000
ASIC Design Engineer
ASIC Design Engineer

Socket.dev • San Diego (CA)

On-site
USD 99,000 - 148,000
Digital ASIC Design Engineer
Digital ASIC Design Engineer

Socket.dev • San Diego (CA)

On-site
USD 99,000 - 148,000
Equal opportunity employer
SOC Design Verification Engineer
SOC Design Verification Engineer

Qualcomm • San Diego (CA)

On-site
USD 98,500 - 147,700
Digital ASIC Design Engineer
Digital ASIC Design Engineer

Qualcomm • San Diego (CA)

On-site
USD 99,000 - 148,000
Bonus program
RSU grants
Benefits package
Connectivity Project Engineer, Principal
Connectivity Project Engineer, Principal

Qualcomm • San Diego (CA)

On-site
USD 192,000 - 288,000