Analog Layout Engineer - 5nm & Below (Hybrid/Remote)

MMC; Cambridge (MA); Hybrid; USD 93,000 - 127,000; Full time

Benefits offered by this job

Remote work option with home setup

25 days annual leave

Pension scheme with salary sacrifice

Private health insurance

Life Assurance

Employee Assistance Programme

Job summary

Agile Analog in Cambridge, UK is seeking an experienced Analog Layout Engineer focused on 5nm and below, with hands-on work on TSMC 4nm FinFET nodes. This role embraces a hybrid/remote setup for qualified candidates with right-to-work in the UK.

You will design and verify analog layouts, work with PDKs, report LVS/DRC issues, and collaborate with circuit designers to translate schematics into robust physical implementations.

Qualifications

• Hands-on experience with TSMC 4nm FinFET and 5nm nodes.
• Practical experience of analog or mixed-signal IC layout on advanced process nodes.
• Experience with TSMC PDKs, technology files and design-rule requirements.
• Familiarity with physical verification, including LVS and DRC, and ability to investigate and resolve layout issues.
• Strong understanding of analog layout fundamentals, including device placement, matching and routing.

Responsibilities

• Designing analog and mixed-signal IC layouts for TSMC 4nm FinFET and 5nm and below.
• Work with high-performance PDKs and process-specific layout rules.
• Create and modify analog layouts at cell and macro level for manufacturability.
• Apply matching, symmetry, centroid structures, shielding and robust routing.
• Run LVS and DRC checks and help resolve layout issues.
• Translate circuit schematics into physical layouts with designers.
• Support DFM and layout optimization for 4nm.
• Advance layout methodologies and automation across projects.
• Collaborate across multiple projects to deliver high-quality IP.

Skills

TSMC 4nm FinFET

Analog layout

5nm and below

Python or SKILL scripting

LVS/DRC

Working with PDKs

Tools

Industry-standard analog layout tools

Job description

Agile Analog in Cambridge, UK is seeking an experienced Analog Layout Engineer focused on 5nm and below, with hands-on work on TSMC 4nm FinFET nodes. This role embraces a hybrid/remote setup for qualified candidates with right-to-work in the UK.

You will design and verify analog layouts, work with PDKs, report LVS/DRC issues, and collaborate with circuit designers to translate schematics into robust physical implementations.