Analog Designer

TPI Global Solutions

Austin (TX)

On-site

USD 120,000 - 180,000

Full time

14 days+
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Job summary

TPI Global Solutions is hiring a PHY engineer with strong SERDES or Memory PHY experience to support both pre-silicon and post-silicon activities. You will collaborate with hardware teams and analyze power, signal, and clock integrity across diverse SOC environments.

Ideal candidates hold a Bachelor's or Master's in Electrical or Computer Engineering and bring lab experience in functional validation or electrical testing of SERDES PHYs.

Qualifications

  • Strong PHY background in SERDES or Memory PHYs.
  • Experience collaborating with engineers and strong communication skills.
  • Analytical problem-solving and willingness to learn.

Responsibilities

  • Support pre-silicon integration and post-silicon support of SERDES PHY IP.
  • Support electrical analyses for power, signal, and clock integrity across many SoC environments.
  • Assist post-silicon teams for production screening, characterization, compliance, and functional testing of 3rd party IP.

Skills

SERDES
Memory PHY
Power integrity
Signal integrity
Clock distribution
Lab experience

Education

Bachelor's or Master's in Electrical or Computer Engineering

Job description

Duration : 12+ months of Contract with high possibility of extension.
Job Responsibilities:

You have strong PHY background in SERDES or Memory PHYs. You are a team player who has excellent communication skills and experience collaborating with other engineers. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

Key Responsibilities:
  • Support pre-silicon integration and post-silicon support of SERDES PHY IP.
  • Support electrical analyses for power, signal, and clock integrity to ensure that SERDES IP operate successfully across many *** SoC environments.
  • Support post-silicon teams for production screening, characterization, compliance, and functional testing of 3rd Party IP.
Preferred Experience:
  • SERDES or memory PHY design experience of some kind
  • Understanding of power noise generation and sensitivity
  • Understanding of the basics of signal integrity, specifically termination impedance, characteristic impedance, transmission lines
  • Knowledge of clock distribution and clock specifications like jitter, DCD, etc. a plus.
  • Some lab experience from functional validation or electrical testing/compliance of SERDES PHYs.
Academic Credentials:
  • Bachelors or Master’s degree in Electrical or Computer Engineering.
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