Analog Designer

Saicon; Austin (TX); On-site; USD 120,000 - 160,000; Full time

Job summary

Saicon's IP Team seeks an engineer proficient in SERDES PHYs to aid pre-silicon integration and post-silicon support across diverse SoC environments.

You will perform electrical analyses for power, signal, and clock integrity and assist with production screening, characterization, and compliance testing of third-party IP. A strong EE foundation is essential.

Qualifications

• SERDES PHY design experience preferred.
• Understanding of power noise generation and sensitivity.
• Basic knowledge of termination impedance and transmission lines.
• Familiarity with clock jitter and DCD is a plus.
• Lab experience in functional validation or electrical testing.

Responsibilities

• Support pre-silicon integration and post-silicon support of SERDES PHY IP.
• Provide electrical analyses for power, signal, and clock integrity across SoC environments.
• Assist post-silicon teams with production screening, characterization, compliance, and functional testing of 3rd party IP.

Skills

SERDES PHY design

Power integrity

Signal integrity

Clock distribution

Lab experience

Education

Bachelors or Masters in Electrical or Computer Engineering

Job description

The IP Team needs a person very familiar with all aspects of SERDES PHYs and capable of supporting pre-silicon integration of various kinds of these IP into all *** products, as well as providing post-silicon support across a range of test scenarios.

KEY RESPONSIBILITIES

• Support pre-silicon integration and post-silicon support of SERDES PHY IP.
• Support electrical analyses for power, signal, and clock integrity to ensure that SERDES IP operate successfully across many *** SoC environments.
• Support post-silicon teams for production screening, characterization, compliance, and functional testing of 3rd Party IP.

PREFERRED EXPERIENCE

• SERDES or memory PHY design experience of some kind
• Understanding of power noise generation and sensitivity
• Understanding of the basics of signal integrity, specifically termination impedance, characteristic impedance, transmission lines
• Knowledge of clock distribution and clock specifications like jitter, DCD, etc. a plus.
• Some lab experience from functional validation or electrical testing/compliance of SERDES PHYs.

ACADEMIC CREDENTIALS

• Bachelors or Masters degree in Electrical or Computer Engineering