Analog Design Intern: High-Speed I/O & PAM4

International Business Machines Corporation; Austin (TX); On-site; USD 28,000 - 41,000; Full time

Job summary

IBM in Austin is seeking Analog Design Interns to contribute to delivering high-speed SERDES interfaces for IBM Power and Z microprocessors in advanced 3nm tech and beyond.

You will help transition IO architecture from NMZ to PAM4, use Cadence and Spice tools to design, simulate, and layout circuits, and gain hands-on experience in transmitter, receiver, PLL, and other analog designs.

Qualifications

• Pursuing a Bachelor's in Electrical Engineering or Computer Engineering.
• Relevant Circuit Design course with applied experience.
• Understanding of Cadence and Spice tools.
• Familiarity with VHDL, Python, Perl, TCL.

Responsibilities

• Help transition the high-speed IO architecture from NMZ to PAM4 for IBM microprocessors.
• Use a mix of industry standard and IBM tools to design, simulate, and layout circuits.
• Work on transmitter, receiver, PLL or other analog designs.
• Learn to develop and deliver complex analog circuits for IBM products.
• Perform schematic design using Cadence tools.
• Perform circuit analysis using Spectre and SPICE simulators.
• Evaluate manufacturability and end-of-life considerations.
• Develop scripts to parse data using Python.

Skills

Analog circuit design

High-speed IO

Circuit analysis

Schematic capture

Python scripting

Cadence tools

VHDL

Spice tools

Spectre

Education

Bachelor's Degree in Electrical Engineering

Bachelor's Degree in Computer Engineering

MS in Electrical Engineering (Analog Circuit Design)

Tools

Cadence design tools

Spectre

SPICE simulators

Python scripting

Job description

IBM in Austin is seeking Analog Design Interns to contribute to delivering high-speed SERDES interfaces for IBM Power and Z microprocessors in advanced 3nm tech and beyond.

You will help transition IO architecture from NMZ to PAM4, use Cadence and Spice tools to design, simulate, and layout circuits, and gain hands-on experience in transmitter, receiver, PLL, and other analog designs.