AI Hardware Engineer Intern - Hybrid, Inference Focus

Intel Corporation; Folsom (CA); Híbrido; USD 101 000 - 102 000; Tempo integral

Resumo da oferta

Intel Corporation is seeking exceptional CS, EE, CE, and AI/ML students for an AI Hardware Engineering internship focused on AI inference and hardware/software co-design.

The role involves hands-on research on AI infrastructure, exploring memory systems, power, and cluster management while collaborating with researchers and engineers in a highly technical team. This internship emphasizes end‑to‑end silicon lifecycle support and strong tooling experience.

Qualificações

• Pursuing PhD in CS/CE/EE/AI/ML or related field.
• Strong foundation in architecture, OS, distributed systems, HPC.
• Familiar with generative AI models and inference concepts.
• Programming experience in C/C++, CUDA or similar.
• GPA 3.0+ is required.

Responsabilidades

• Conduct technical research on AI infrastructure including CPUs/GPUs/ASICs.
• Analyze GenAI workloads for hardware implications and latency/bandwidth needs.
• Evaluate AI inference pipelines and memory/subsystem behavior.
• Identify gaps in hardware, tooling, and reference architectures.
• Develop architectural recommendations and benchmarks.
• Collaborate with Intel teams and external collaborators.
• Present findings with architecture diagrams and reports.

Conhecimentos

Computer architecture

Distributed systems

AI/ML systems

C/C++/CUDA

Formação académica

PhD candidate in Computer Science/Engineering/AI/ML

GPA 3.0 or higher

Ferramentas

vLLM

SGLang

Hugging Face Transformers

PyTorch

Triton

Kubernetes

Linux

Descrição da oferta de emprego

Intel Corporation is seeking exceptional CS, EE, CE, and AI/ML students for an AI Hardware Engineering internship focused on AI inference and hardware/software co-design.

The role involves hands-on research on AI infrastructure, exploring memory systems, power, and cluster management while collaborating with researchers and engineers in a highly technical team. This internship emphasizes end‑to‑end silicon lifecycle support and strong tooling experience.