AI Hardware Co-Design Engineer – Accelerate Next-Gen Silicon

OpenAI; Seattle (WA); Hybrid; USD 180,000 - 280,000; Full time

Benefits offered by this job

Relocation assistance

Hybrid work model

Job summary

OpenAI's Hardware organization is seeking an engineer to co-design future hardware with vendors for performance and programmability. You will collaborate with kernel, compiler, and ML teams to define accelerator features and optimize compute and memory hierarchies for training and inference across OpenAI models.

This role is based in San Francisco with a hybrid model (3 days in office) and relocation assistance for new hires.

Qualifications

• 4+ years of industry experience in hardware/software co-design.
• Strong experience in co-design of hardware and software.
• Deep understanding of GPU/AI accelerators.
• Experience with CUDA, Triton or related accelerator languages.
• Experience with ML precision formats and system-level performance modeling.
• Proficient in C/C++ and Python.
• Ability to collaborate with ML engineers, kernel writers and compiler developers.

Responsibilities

• Co-design future hardware for programmability and performance with vendors.
• Assist vendors in developing kernels and integrate support in the compiler.
• Develop performance estimates for kernels across hardware.
• Build system models and analyze scale-up/scale-out decisions.
• Collaborate with ML, kernel, and compiler teams to align accelerator needs.
• Coordinate with internal and external partners.
• Influence roadmaps with hardware partners for OpenAI workloads.
• Evaluate potential accelerators and platforms.
• Influence datacenter network and rack-level hardware roadmaps.

Skills

Co-design hardware

GPU/AI accelerators

CUDA

Python

C/C++

ML precision

Performance modeling

System architecture

Collaboration

Tools

CUDA

Triton

Job description

OpenAI's Hardware organization is seeking an engineer to co-design future hardware with vendors for performance and programmability. You will collaborate with kernel, compiler, and ML teams to define accelerator features and optimize compute and memory hierarchies for training and inference across OpenAI models.

This role is based in San Francisco with a hybrid model (3 days in office) and relocation assistance for new hires.