AI Hardware Architect & ML Research Engineer

OpenAI; San Francisco (CA); Hybrid; USD 120,000 - 180,000; Full time

Benefits offered by this job

Relocation assistance

Job summary

A pioneering AI research company in San Francisco seeks a Research-Hardware Codesign Engineer. This hybrid role involves shaping AI silicon architecture, debugging system discrepancies, and writing quantization kernels. Candidates should have a strong background in Python and C++ or Rust, with experience in AI frameworks such as Triton or CUDA. Communication skills are essential as this role requires collaboration between diverse teams. Applicants must thrive in innovation-driven environments and be adaptable to evolving project requirements.

Qualifications

• Exceptional track record of high-quality technical output.
• Experience writing quantitative kernels and debugging gaps in AI architecture.
• Working knowledge of tensor operations in large ML systems.

Responsibilities

• Shape the numerics and architecture of future AI silicon.
• Debug gaps between rooflines and reality.
• Write quantization kernels and implement novel numeric RTL.

Skills

Strong Python

C++ or Rust

Triton, CUDA

PyTorch or JAX

Floating point numerics

Deep understanding of transformer models

Experience writing RTL

Cross-functional communication

Job description

A pioneering AI research company in San Francisco seeks a Research-Hardware Codesign Engineer. This hybrid role involves shaping AI silicon architecture, debugging system discrepancies, and writing quantization kernels. Candidates should have a strong background in Python and C++ or Rust, with experience in AI frameworks such as Triton or CUDA. Communication skills are essential as this role requires collaboration between diverse teams. Applicants must thrive in innovation-driven environments and be adaptable to evolving project requirements.