A leading AI technology firm is seeking a Hardware Engineer to join their hardware team in San Bruno, California. The role involves designing and building neural network accelerators and contributing to RTL design and implementation. Candidates should demonstrate proficiency in HDL languages like SystemVerilog and have a strong foundation in digital design. The position offers competitive benefits including medical and disability insurance, as well as paid parental leave.
Qualifications
Experience or coursework involving RTL design and microarchitecture.
Knowledge of physical design and verification.
Interest in or exposure to machine learning accelerators.
Responsibilities
Design and implement RTL for components of a neural network accelerator.
Translate architectural specifications into efficient hardware implementations.
Collaborate with hardware architects to ensure functional correctness.
Skills
Proficiency in HDL languages like SystemVerilog and/or VHDL
Strong foundation in digital design
Proficiency in Python for scripting and automation
Strong technical communication skills
Education
BS, MS, or PhD in Electrical Engineering, Computer Engineering, or a related field
Tools
UVM design verification frameworks
Job description
A leading AI technology firm is seeking a Hardware Engineer to join their hardware team in San Bruno, California. The role involves designing and building neural network accelerators and contributing to RTL design and implementation. Candidates should demonstrate proficiency in HDL languages like SystemVerilog and have a strong foundation in digital design. The position offers competitive benefits including medical and disability insurance, as well as paid parental leave.