AI Hardware Research Engineer – Hybrid, San Jose

TSMC - Taiwan Semiconductor Manufacturing Company Limited

San Jose (CA)

Hybrid

USD 130,000 - 180,000

Full time

14 days+

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Benefits offered by this job

Hybrid work schedule (4 days in-office

Job summary

TSMC Technology, Inc. in San Jose is hiring an AI Hardware Research Engineer to drive innovation at the intersection of technology, architecture, and algorithms for AI hardware design. This role offers cross-disciplinary research, collaboration across R&D, and a hybrid schedule with 4 days in the office.

A Ph.D. in Electrical Engineering or Computer Science is required, with 0–2 years of post-PhD experience.

Qualifications

  • Ph.D. in Electrical Engineering or Computer Science with strong publication record.
  • 0–2 years post-PhD industry experience in semiconductor research.
  • Experience with AI hardware modeling, LLM accelerators, or similar.

Responsibilities

  • Conduct workload-level performance evaluation and technology benchmarking for AI systems by developing modeling and simulation capabilities
  • Provide strategic guidance to the broader R&D Organization on technology development directions, based on system-level evaluations and projections of future industry trends
  • Identify opportunities to fully leverage packaging and memory technologies within novel AI hardware architectures
  • Develop innovative technology and architecture concepts to address scaling and efficiency bottlenecks in next-generation AI hardware

Skills

Modeling & Simulation
LLM Architectures
Disaggregated Systems
Memory Architectures
Photonics & Thermal Management
AI Hardware Algorithms

Education

Ph.D. in Electrical Engineering or Computer Science

Tools

Hardware Design Tools
Memory Packaging Technologies
Photonic Technologies

Job description

TSMC Technology, Inc. in San Jose is hiring an AI Hardware Research Engineer to drive innovation at the intersection of technology, architecture, and algorithms for AI hardware design. This role offers cross-disciplinary research, collaboration across R&D, and a hybrid schedule with 4 days in the office.

A Ph.D. in Electrical Engineering or Computer Science is required, with 0–2 years of post-PhD experience.

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