Advanced Packaging Metrology Engineering Manager

Intel Corporation; Hillsboro, Northern (OR, KY); Hybrid; USD 156,000 - 255,000; Full time

Benefits offered by this job

Stock bonuses

Health benefits

Retirement plan

Vacation

Job summary

Intel Corporation in Hillsboro, Oregon seeks an Advanced Packaging Metrology Engineering Manager to lead a high‑performing team advancing wafer-level packaging technologies. You will drive feasibility studies, enable manufacturing readiness, and manage technology transfers to global sites.

The role emphasizes strategic leadership, collaboration, and strong communication to push semiconductor innovation forward.

Qualifications

• Bachelor’s degree in science, engineering, or related STEM field with 6+ years of experience, or Master’s with 4+ years, or PhD with 4+ years.
• Experience in semiconductor wafer or assembly, process development, and project execution.
• Leadership experience in managerial roles within a engineering or R&D setting.

Responsibilities

• Lead a team of engineers to develop advanced wafer processing and packaging solutions.
• Drive technology enablement, feasibility studies, and module improvements.
• Ensure demonstrations at high volume and manage transfers to global manufacturing sites.
• Collaborate with cross-functional teams to deliver process solutions meeting device specs.

Skills

Metrology

Leadership

Communication

Strategic thinking

Collaboration

Coaching

Problem solving

Adaptability

Inclusion

Education

Bachelor's degree in STEM

Master's degree in STEM

PhD in STEM

Tools

Metrology equipment

Wafer-level packaging tech

Job description

## Advanced Packaging Metrology Engineering ManagerApply: US, Oregon, Hillsboro: Full time: Posted Today: End Date: December 29, 2026 (30+ days left to apply): JR0287424# **Job Details:**## Job Description:Intel Corporation is a global technology leader at the forefront of semiconductor innovation, dedicated to creating world-changing technology that improves the lives of every person on the planet. Intel's Wafer-Level Assembly Technology Development (WATD) group is a dynamic, forward-thinking organization focused on developing next-generation packaging technologies. With a culture built on collaboration, inclusion, and relentless innovation, Intel offers an environment where your work truly matters — and where the future of technology is being written every day. We are seeking a visionary and technically accomplished Advanced Packaging Metrology Engineering Manager to lead a high-performing team of engineers at the cutting edge of advanced semiconductor packaging. In this pivotal role, you will drive innovation in wafer-level assembly technologies, champion manufacturing readiness, and deliver results that reinforce Intel's position as a global technology leader. You will shape the future of advanced packaging by enabling robust process pathways, executing long-term technology strategies, and cultivating a team culture rooted in excellence, accountability, and collaboration. **Key Responsibilities:*** Lead and inspire a team of engineers to develop advanced wafer processing and packaging solutions that push the boundaries of semiconductor technology.* Drive technology enablement, feasibility studies, and module improvement initiatives that align with Intel's strategic roadmap.* Ensure successful demonstrations of manufacturing capabilities at high volumes and manage seamless technology transfers to global manufacturing sites.* Partner with cross-functional teams — including integration, device, and yield engineering — to deliver process solutions that meet device specifications while optimizing safety, quality, and cost.* Collaborate with supplier executive management to identify and implement innovative concepts into manufacturing processes.* Execute long-term strategies for module engineering to support future technology needs and market demands.* Set clear, measurable team objectives and apply differentiated performance management to consistently drive results.* Coach, mentor, and develop engineers in skills growth, technology road mapping, and pathfinding for future innovations.* Foster a collaborative, inclusive, and psychologically safe team environment that encourages bold thinking and accountability. **As a Successful Candidate, You Will Bring:*** A Natural Leader — You inspire confidence, motivate teams, and bring out the best in the people around you.* A Clear Communicator — You articulate complex ideas with clarity and adapt your communication style to diverse audiences.* A Strategic Thinker — You see the big picture while staying grounded in the details that matter.* A Collaborative Partner — You thrive in cross-functional environments and build strong relationships with stakeholders at all levels.* A Coach and Mentor — You are genuinely invested in the growth and development of your team members.* An Innovative Problem-Solver — You approach challenges with curiosity, creativity, and a solutions-oriented mindset.* Resilient and Adaptable — You navigate ambiguity with composure and lead your team through change with confidence.* Inclusive and Empathetic — You champion diversity of thought and create environments where everyone feels valued and heard. Are you ready to lead a team that's shaping the future of semiconductor technology? Join Intel's WATD group in Hillsboro, Oregon, and make your mark on the technologies that connect and enrich lives worldwide.## **Qualifications:**You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. **Minimum Qualifications:*** Bachelor’s degree in science, engineering, or a related STEM field with 6+ years of relevant experience; OR Master's degree in a related STEM field with 4+ years of relevant experience; OR PhD in a related STEM field with 4+ years of relevant experience.* Relevant experience can be any of the following: + Semiconductor wafer or assembly process, equipment, or materials development. + Process development methodology, project management, and schedule-based execution.**Preferred Qualifications:*** 4+ years of experience in: + Metrology area + Managerial position + Wafer-level assembly or wafer-level packaging research and development. + Technical leadership in process development for semiconductor manufacturing. + Hybrid bonded interconnects (HBI), redistribution layer (RDL) packaging, and ultra-fine pitch solder connections. + Lead programs from strategy formation through high-volume production.## Job Type:Experienced Hire## Shift:Shift 1 (United States of America)## Primary Location:US, Oregon, Hillsboro## Additional Locations:## Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.## ## Position of TrustN/A## BenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.Annual Salary Range for jobs which could be performed in the US: $155,520.00-255,200.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.**Work Model for this Role**This role will require an on-site presence. \\* Job posting details (such as work model, location or time type) are subject to change.