Advanced Mixed-Signal Verification Engineer (RF/Analog)

Apple Inc.; Austin (TX); On-site; USD 120,000 - 170,000; Full time

Job summary

Apple Inc. is seeking a Design Verification Engineer to own RNM/SystemVerilog modeling and verification for analog/RF blocks inside a large SoC within Apple’s Hardware Technology organization.

You will develop self-checking models, create assertions, and work with analog designers to set up the AMS simulation environment, ensuring compliance with analog/digital specifications and driving successful verification outcomes.

Qualifications

• Bachelor's degree required.
• Strong fundamentals in analog/RF circuit theory.
• Experience with RNM coding in SystemVerilog.

Responsibilities

• Develop RNM RF/Analog models in SystemVerilog.
• Create self-checking verification models.
• Define model accuracy for verification goals.
• Write assertions to ensure analog/digital specs.
• Configure AMS simulation environment with Analog designers.
• Debug complex chip digital-on-top testbenches and diagnose failures.

Skills

RNM SystemVerilog

Analog RF theory

Digital/AMS verification

Education

Bachelor's degree

Tools

Cadence mixed-signal environment

Job description

Apple Inc. is seeking a Design Verification Engineer to own RNM/SystemVerilog modeling and verification for analog/RF blocks inside a large SoC within Apple’s Hardware Technology organization.

You will develop self-checking models, create assertions, and work with analog designers to set up the AMS simulation environment, ensuring compliance with analog/digital specifications and driving successful verification outcomes.