5G/6G RAN Software Engineer – Real-Time Linux & C++

QUALCOMM, Inc.

San Diego (CA)

On-site

USD 109,000 - 164,000

Full time

2 days ago
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Job summary

Qualcomm Technologies, Inc. in San Diego seeks a software engineer for the Wireless R&D group to help develop and verify 5G/6G wireless systems.

You will contribute to a Linux-based, multi-threaded C++ service enabling advanced radio access networks. The role involves owning RAN Layer 2 responsibilities, driving 5G/6G feature development from spec to commercialization, and designing high-performance schedulers and data paths while interfacing with RRC and PHY components.

Qualifications

  • 2+ years of SW design and development with C++ or strong C with OO concepts.
  • Experience in Linux environment and multi-core, multi-threaded programming.
  • Familiarity with 3GPP 4G/5G specs and translating them to requirements.

Responsibilities

  • Own 5G/6G RAN Layer 2 responsibilities (MAC, RLC, PDCP, SDAP).
  • Drive 3GPP 5G/6G feature development from spec through commercialization.
  • Design and develop L2 functionality including DL/UL config, data-plane, call flows.
  • Implement and optimize fixed/dynamic DL/UL schedulers and data-plane paths.
  • Interface with NodeB Layer 3 (RRC) and Layer 1 (PHY).
  • Develop real-time-sensitive, multi-core, multi-threaded software for NodeB.
  • Debug, profile, and optimize for latency, throughput, and reliability.

Skills

C++
Linux
Multi-threading
Communication
Analytical thinking

Education

Bachelor's degree in Computer Science or Electrical Engineering

Tools

Git
GDB
IDEs/Build systems

Job description

Qualcomm Technologies, Inc. in San Diego seeks a software engineer for the Wireless R&D group to help develop and verify 5G/6G wireless systems.

You will contribute to a Linux-based, multi-threaded C++ service enabling advanced radio access networks. The role involves owning RAN Layer 2 responsibilities, driving 5G/6G feature development from spec to commercialization, and designing high-performance schedulers and data paths while interfacing with RRC and PHY components.

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