Test Engineer

Tessolve; Singapore; Hybrid; SGD 52,000 - 73,000; Full time

Job summary

Tessolve in Singapore seeks a Post Silicon Validation/Test Engineer to develop test programs for digital, PMIC, RF and mixed-signal devices, using bench and ATE systems, primarily Advantest and Teradyne platforms.

Collaborate with design and quality teams on silicon debug, device characterization, and production release activities. Strong hands-on lab skills and excellent communication are essential for this role.

Qualifications

• Bachelor's or higher in Electronics/Electrical Engineering.
• 2–7 years of relevant Test Engineering experience preferred.
• Hands-on experience with bench instrumentation and IC characterization.

Responsibilities

• Develop test programs for Digital, PMIC, RF & Mixed Signal devices on bench and/or ATE (Advantest 93K, SmarTest 7/8, Teradyne UltraFlex).
• Collaborate with design engineers on silicon debug, device characterization and production release activities.
• Debug digital vectors (JTAG/SCAN/ATPG/Functional/Mbist) across PVT; characterize RF/PMIC/Mixed Signal IP.
• Support test program handoff, yield improvement and test time reduction; work with cross-functional teams.

Skills

Analog & digital electronics

Analytical & problem solving

Verbal & written communication

Independence

Education

Bachelor's / Master in Electronics or Electrical Engineering

Tools

Advantest 93K ATE

SmarTest 7/8

Teradyne UltraFlex

Job description

2 - 7 Years

Regular Employee - Probation

Job Description

Post Silicon Validation/Test(ATE/Bench) Engineer

Positions: 5

• Test program development for Digital, PMIC, RF & Mixed Signal products on Bench and (or) ATE (primarily on Advantest 93k - SmarTest 7, SmarTest 8 / Teradyne UFLEX)
• Work closely with the design engineers on the first silicon debug, device characterization, test program bring up and production release activities
• Debug of digital vectors (JTAG/SCAN/ATPG / Functional / Mbist) and Device characterization across PVT (Process, Voltage and Temperature)
• Understanding and experience in characterization of RF, PMIC or Mixed Signal IP (ADC, DAC, PLL and etc.)
• Involve on test program hand off, production release, yield improvement and test time reduction
• High level of collaboration and interaction with different Product Engineering, Design Engineering, Quality Engineering, and Foundry Engineering teams.

- Usage of bench instrumentation for characterization of ICs

Job Requirements

• Graduates from Degree in Electronics / Electrical Engineering
• Minimum 2-7 yrs relevant experience on the Test Engineering is preferred
• Hands on experience on Teradyne Ultra Flex or Advantest 93K ATE’s is added advantage.2
• - Usage of bench instrumentation for characterization of ICs
• Good Knowledge of analog and digital electronics is desired.
• Strong analytical and problem solving ability with desire to perform hands-on work within a lab environment is a must.
• Very strong verbal and written communication skills and able to work independently
• Only Singaporeans/ SPR preferred.