System‑Level Product Development Engineer (MTS Testing)

Thundersoft; Singapore; On-site; SGD 180,000 - 240,000; Full time

Job summary

Thundersoft in Singapore is seeking a senior SLT Test Engineer to own test program development for client next‑gen microprocessors. You will work on internal SLT platforms, debug test infrastructure, and create hardware, software, and diagnostics from product definition through manufacturing.

You will drive test coverage, optimize test time, and collaborate with cross‑functional teams to bring up test flows for pre and post‑silicon phases, ensuring quality and rapid issue resolution.

Qualifications

• Mastery of SLT and System Level Test concepts.
• 10+ years of NPI SLT leadership experience.
• Proficient in Windows, Unix, and Linux operating systems.
• Experience with IC test and ASIC bring up and support activities.

Responsibilities

• Drive test solution development and optimize to meet milestones (schedule, test time, yield, cost, quality).
• Lead SLT pattern development, calibration test flows, debugging, and characterization in an NPI Product Engineering team.
• Collaborate with cross‑functional teams to determine SLT coverage, content, and root cause analysis of SLT failures.
• Engage in pre and post silicon phases, plan test flows, bring up coverage, and coordinate hardware checkout.
• Mentor junior engineers and interface with OSAT partners for test program implementation.

Skills

NPI leadership

SLT test patterns

C/C++/Java/Python

Test/debug hardware software

OS kernel/BIOS

Mentoring engineers

Education

Electrical/Electronics, Computer Engineering

Tools

Git

Job description

As part of this team, you will have complete ownership in developing SLT test program for the client next-generation microprocessors. You will work on internal SLT platforms and debug test infrastructure issues including test HW, test SW, diagnostics, and device-specific IP. Additionally, you will leverage SLT data to drive improvements in either the product’s platform software or upstream ATE test coverage. The engineer must ensure overall compatibility, compliance, and test coverage of microprocessors from product definition through product qualification and into high-volume manufacturing by developing product specific test hardware, software, and diagnostics.

KEY RESPONSIBILITIES:

• Accountable for driving test solution/coverage development, optimization to meet business milestones: schedule, test time, yield, cost and quality.
• Must have a strong proven track record of NPI experience in directing SLT Test patterns, calibration test flows/method development, debug, test and characterization experience working in an NPI Product Engineering team.
• Collaborate with various engineering teams to determine System Level Test (SLT) coverage, content, characterization requirements, and root cause resolution for SLT device failures
• Early engagement in pre and post silicon phases, including test flow planning, test coverage bring-up, test flow integration, and test hardware checkout.
• Validate new product features, test conditions, test methodologies, and test contents
• Perform silicon characterization across process, voltage, and temperature
• Conducts engineering evaluation, test program correlation, releases for high volume production and engineering enhancement or improvement projects
• Drive Key Performance Indicators such as test time reduction, yield debug, quality improvement across products and drive innovation on test strategy
• Provides overall Test Engineering support for the client’s S3 products tested at global facilities
• Working with regional teams, including Product development group and Manufacturing group in the early stage bring up for product cycles at the client high volume sites
• Represents test team on any test excursions and issue escalations to the respective owner to identify resolution or containment action for the issue
• Interface with OSAT partners for test program implementation and resolution for operation issues
• Requires strong understanding of test program, good communication and capability to drive/deliver critical business milestones
• Provide technical supervision or mentoring junior engineers
• Strong experience with RMA debug and familiar with FA process is a plus.

PREFERRED EXPERIENCE:

• Mastery of principles of test experience in System Level Test or x86 System Architecture
• >10 years of SLT technical leader with a successful track record of bringing up test patterns, debug low yield, test flow integration and characterization experience working in an NPI Product Engineering team.
• Proficient in Windows, Unix, and Linux operating systems
• Experience in platform test and debug
• Experience with IC test experience and assist in ASIC bring up and support activities
• Technical knowledge in OS kernel, driver, BIOS firmware
• Demonstrated programming and scripting experience using various programming languages (C, C++, Java, Ruby, Perl, Python)
• Knowledgeable in version control tools (Git)
• Electrical/Electronics, Computer Engineering, or comparable disciplines