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UST is seeking a hands-on system-debug engineer to own SLT and platform quality for embedded x86 products. You will investigate customer-return and factory-reported failures, reproduce complex issues, and drive corrective actions with design, validation, firmware, BIOS, and manufacturing teams.
The role requires strong experience with UART/JTAG, oscilloscopes, Linux, and scripting (Python/C++). You will mentor others, establish scalable debug methodologies, and communicate findings to engineers
The engineer will be responsible for System-Level Test (SLT) debug, platform quality engineering and failure analysis for Embedded x86 SoC products. The role investigates customer-return and factory-reported failures, reproduces complex system-level issues, isolates root causes and drives corrective and preventive actions with Design, Validation, Firmware, BIOS, Product Engineering, Manufacturing and Failure Analysis teams.
The engineer will use SLT infrastructure, platform diagnostics, firmware and operating-system logs, system characterization and structured root-cause methods to improve product quality, reliability, manufacturing effectiveness and customer experience.
The ideal candidate is a hands-on system-debug engineer with strong experience in SLT, platform bring-up, embedded x86 diagnostics, failure reproduction and customer-return analysis. The candidate should understand the complete product stack, including silicon, package, board, power delivery, BIOS/UEFI, firmware, operating system, drivers and workloads. More senior candidates are expected to establish scalable debug methodologies, lead cross-functional investigations, influence product-quality decisions and mentor experienced engineers.
BS with 5+ years, MS with 3+ years, or PhD with 0-1+ years of relevant experience.