Platform Validation Engineer (System debug)

UST; Singapore; On-site; SGD 90,000 - 150,000; Full time

Job summary

UST seeks a hands-on System-Level Test (SLT) Debug & Platform Quality Engineering specialist to tackle complex failures across embedded x86 platforms. You will investigate customer-return and factory issues, reproduce problems, isolate root causes and drive corrective actions with multi-disciplinary teams.

You will leverage SLT infrastructure, firmware logs, BIOS/UEFI context and platform telemetry to improve quality, reliability and customer experience, mentoring newer engineers as needed.

Qualifications

• Hands-on system-debug experience with SLT or similar.
• Experience with embedded x86 diagnostics and BIOS/UEFI.
• Strong knowledge of CPU, memory, PCIe, USB and network interfaces.
• Proficiency in Python, C/C++, Perl or Bash.
• Experience integrating AI agents into daily workflows is desirable.

Responsibilities

• Own or lead SLT debug for customer-return and factory-reported failures.
• Analyze boot failures, POST errors, hangs, resets, crashes and reliability issues.
• Collect and interpret serial-console output, firmware traces, event logs and platform telemetry.
• Generate hypotheses and design experiments to prove observed failures.
• Collaborate with cross-functional teams to improve SLT coverage, diagnostics, automation, screening and test stability.
• Prepare technical reports and communicate conclusions, risk and recommended actions to stakeholders.
• Lead cross-functional initiatives and mentor engineers in system-debug and root-cause methods.

Skills

System-level debugging

SLT

Embedded x86 diagnostics

Root-cause analysis

Python

C/C++

Linux

Education

BS in Electrical/Computer Engineering

MS in Electrical/Computer Engineering

PhD in a related field

Tools

UART

JTAG

Oscilloscopes

Logic analyzers

Power measurement

Job description

System-Level Test (SLT) Debug & Platform Quality Engineering

THE ROLE

The engineer will be responsible for System-Level Test (SLT) debug, platform quality engineering and failure analysis for Embedded x86 SoC products. The role investigates customer-return and factory-reported failures, reproduces complex system-level issues, isolates root causes and drives corrective and preventive actions with Design, Validation, Firmware, BIOS, Product Engineering, Manufacturing and Failure Analysis teams.

The engineer will use SLT infrastructure, platform diagnostics, firmware and operating-system logs, system characterization and structured root-cause methods to improve product quality, reliability, manufacturing effectiveness and customer experience.

THE PERSON

The ideal candidate is a hands-on system-debug engineer with strong experience in SLT, platform bring-up, embedded x86 diagnostics, failure reproduction and customer-return analysis. The candidate should understand the complete product stack, including silicon, package, board, power delivery, BIOS/UEFI, firmware, operating system, drivers and workloads. More senior candidates are expected to establish scalable debug methodologies, lead cross-functional

investigations, influence product-quality decisions and mentor experienced engineers.

KEY RESPONSIBILITIES

• Own or lead SLT debug for customer-return, qualification and factory-reported failures.
• Analyze boot failures, POST errors, hangs, resets, crashes, performance anomalies, device-enumeration issues and reliability failures.
• Collect and interpret serial-console output, firmware traces, event logs, kernel logs, crash data, diagnostic results and platform telemetry.
• Generate hypothesis and able to come up with experiments and electrical tests to prove the hypothesis for observed failures
• Work with cross-functional teams to improve SLT coverage, diagnostics, automation, screening effectiveness, test stability, cycle time and failure triage.
• Prepare clear technical reports and communicate conclusions, risk and recommended actions to engineering, management and customer-quality stakeholders.
• Lead cross-functional technical initiatives appropriate to the assigned job level and mentor engineers in system-debug and root-cause methods.

PREFERRED EXPERIENCE:

• Hands-on experience developing, executing or debugging system-level tests (UBUNTU or WINDOWs based) for x86 platform (desktop, industrial PC, server, or embedded x86 devices).
• Strong knowledge of x86 platform architecture, system boot flow and interactions among CPU, memory, storage, PCIe, USB and network interfaces.
• Experience with BIOS/UEFI, firmware initialization, POST-code interpretation, serial-console debug and operating system boot troubleshooting.
• Knowledge of using system-debug instruments and interfaces such as UART, JTAG, oscilloscopes, logic analyzers and platform power or signal measurements.
• Proficiency in Linux command-line environments and at least one relevant language: Python, C/C++, Perl or Bash.
• Experience integrating AI agents into daily workflows is highly desirable.

ACADEMIC CREDENTIALS & EXPERIENCE

• Senior Engineer: BS with 5+ years, MS with 3+ years, or PhD with 0–1+ years of relevant experience.
• MTS: BS with 8+ years, MS with 6+ years, or PhD with 3+ years of relevant experience.