Silicon Validation Test Engineer (ATE/Bench)

Tessolve; Singapore; Hybrid; SGD 52,000 - 73,000; Full time

Job summary

Tessolve in Singapore seeks a Post Silicon Validation/Test Engineer to develop test programs for digital, PMIC, RF and mixed-signal devices, using bench and ATE systems, primarily Advantest and Teradyne platforms.

Collaborate with design and quality teams on silicon debug, device characterization, and production release activities. Strong hands-on lab skills and excellent communication are essential for this role.

Qualifications

• Bachelor's or higher in Electronics/Electrical Engineering.
• 2–7 years of relevant Test Engineering experience preferred.
• Hands-on experience with bench instrumentation and IC characterization.

Responsibilities

• Develop test programs for Digital, PMIC, RF & Mixed Signal devices on bench and/or ATE (Advantest 93K, SmarTest 7/8, Teradyne UltraFlex).
• Collaborate with design engineers on silicon debug, device characterization and production release activities.
• Debug digital vectors (JTAG/SCAN/ATPG/Functional/Mbist) across PVT; characterize RF/PMIC/Mixed Signal IP.
• Support test program handoff, yield improvement and test time reduction; work with cross-functional teams.

Skills

Analog & digital electronics

Analytical & problem solving

Verbal & written communication

Independence

Education

Bachelor's / Master in Electronics or Electrical Engineering

Tools

Advantest 93K ATE

SmarTest 7/8

Teradyne UltraFlex

Job description

Tessolve in Singapore seeks a Post Silicon Validation/Test Engineer to develop test programs for digital, PMIC, RF and mixed-signal devices, using bench and ATE systems, primarily Advantest and Teradyne platforms.

Collaborate with design and quality teams on silicon debug, device characterization, and production release activities. Strong hands-on lab skills and excellent communication are essential for this role.