Senior Staff Engineer Chip Verification

Infineon

Singapore

In loco

SGD 90.000 - 150.000

Tempo pieno

9 giorni fa

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Descrizione del lavoro

Infineon Technologies seeks an experienced Chip Verification Engineer to lead end-to-end verification of complex SoC designs, focusing on Network-on-Chip interconnects. The role includes developing verification plans, building SystemVerilog/UVM testbenches and VIPs, and creating C/C++ and Perspec test cases, with validation across RTL, unit-delay and gate-level environments.

Candidates should have 5–12 years in chip verification, deep SystemVerilog/UVM expertise, and hands-on experience with

Competenze

  • 5–12 years of relevant work experience in chip verification.
  • Strong SystemVerilog and UVM expertise.
  • Experience with NOC/AMBA/AXI verification and VIP integration.
  • Hands-on with Xcelium, Spectre and Simvision for simulation/debug.
  • Proficient in version control and bug-tracking tools.

Mansioni

  • Execute end-to-end verification of SoC designs including NoC interconnects.
  • Develop verification plans and build SystemVerilog/UVM test benches and VIPs.
  • Create C/C++ and Perspec test cases and drive verification across RTL and gate-level.
  • Simulate and debug using Emulators, Portable Stimulus, and formal methods as needed.
  • Collaborate with team to review requirements and guide junior colleagues.

Conoscenze

SystemVerilog
UVM
NOC verification
AMBA/AXI
Xcelium
Spectre
Simvision
Git

Formazione

Masters/Bachelors in Electrical Engineering or Computer Science

Strumenti

Gitlab
Git/Bitbucket
ClearCase
CVS
SVN

Descrizione del lavoro

We are seeking an experienced Chip Verification Engineer to execute end-to-end verification of complex System-on-Chip designs, with a focus on Network-on-Chip (NoC), interconnect and system-level verification. The role involves developing verification plans, building and integrating SystemVerilog/UVM testbenches and VIPs, creating C/C++ and Perspec test cases, and performing simulation and debugging across RTL, unit-delay and gate-level environments.

Your role Key responsibilities in your new role
  • Execute System-on-Chip (SoC) verification tasks including Network on Chip (NOC) interconnect verification and work closely with team members to review and understand the relevant functional and safety-related requirements.
  • Write verification plans to meet these requirements after close alignment with other verification teams for proper work split according to mutually acceptable verification assignment.
  • Execute the verification plan by developing C/C++ and Perspec test cases.
  • Develop System Verilog/UVM test bench components and by integrating 3rd party VIP components.
  • Simulate and debug at RTL, Unit Delay, and Gate Level using appropriate tools and flows including Emulator, Portable Stimulus, or Formal methodologies for functional and toggle coverage closure.
  • For a more senior role, you will also l ead a team technically through exploring new environments and identifying potential enhancement areas through new methodology. Identify and set mid/long term goals based on benchmarking against industry standards.
Your profile
Qualifications and skills to help you succeed
  • Masters/Bachelors in Electrical Engineering or Computer Science with 5-12 years of relevant work experience.
  • Strong foundational knowledge of digital/mixed-signal design & verification .
  • Understanding of UPF context of analog/transistor level.
  • Advanced knowledge and hands-on experience of System Verilog and UVM Test Bench bring up.
  • Understand the usage of tools like Xcelium, Spectre(X) and Simvision.
  • Hands-on experience in hardware-software debugging at the system or application level.
  • Hand-on experience with gate-level-simulations and with debugging/troubleshooting skills.
  • Exposure to version-controlling (eg, Gitlab, Git/Bitbucket, ClearCase, CVS, SVN) and bug-management schemes.
  • Hands on experience in Network on Chip (NOC) verification and AMBA/AHB/AXI with regards to protocol/uVC/VIP integration is a plus.
  • Knowledge of Github Copilot, AI/ML and advanced data analytics applied to SoC verification is a strong plus.
  • Dynamic and energetic with zero verification escape mindset.
  • Self-motivated, flexible, good communication with interpersonal skills and is a good team player who is able to work well with both internal and external partners.
  • Proven ability to achieve results in a very dynamic, Ulti-site environment and be able to coordinate with priorities and self-initiatives.
  • Knowledge on ISO26262 and ISO21434 are advantageous.
  • Verification experience in COM, CPU peripherals, BUS protocols or pattern development is a plus. Experience in test bench/verification environment set up is also a plus.
  • Candidate who has more relevant working experience will be considered for a more senior position.
#WeAreIn for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in? We are on a journey to create the best Infineon for everyone.

We strive to create the best Infineon for everyone by embracing diversity and inclusion. We welcome applicants for who they are and offer a workplace built on trust, openness, respect and equal opportunity.

Our hiring decisions are based on skills and experience. Even if you don’t meet every requirement, we encourage you to apply.

Please let your recruiter know if you need any accommodations during the interview process.

Learn more about our various contact channels and about Diversity & Inclusion at Infineon.

Carol Lee

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