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Silicon Labs is seeking a design engineer to advance block architecture and RTL coding for SoC integration in Singapore. You will collaborate with cross-functional teams to define requirements, partition designs, and implement robust digital blocks and IP within the SoC infrastructure.
You will verify blocks and the overall SoC using directed, random, and assertion-based methods, and contribute to embedded firmware for validation and documentation deliverables.
Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world’s most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity applications. Headquartered in Austin, Texas, Silicon Labs has operations in over 16 countries and is the trusted partner for innovative solutions in the smart home, industrial IoT, and smart cities markets. Learn more atwww.silabs.com.
Detailed block architecture/design of digital circuits
In-depth understanding of block requirements, system needs, and interfaces
Develop block specification, working with cross-functional teams to develop requirements
Determine appropriate design approach and partitioning
Implement design through RTL coding, adhering to quality guidelines
SoC Integration
Verification
Documentation
Silicon Labs is an equal opportunity employer and values the diversity of our employees. Employment decisions are made on the basis of qualifications and job-related criteria without regard to race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status, or any other characteristic protected by applicable law.