Senior Mixed-Signal Verification Lead

Infineon Technologies AG; Singapore; On-site; SGD 75,000 - 90,000; Full time

Job summary

Infineon Technologies AG in Singapore is seeking a verification engineer to contribute to complex projects and mentor junior engineers. The role requires a degree in Electronics Engineering or a related field with substantial experience in UVM methodology.

Key responsibilities involve setting up verification metrics, coordinating activities, and improving verification environments while promoting a culture of technical excellence within the team. Proficient knowledge of verification methodologies and fluent English communication skills are essential.

Qualifications

• 5+ years of pre-silicon verification experience using UVM methodology.
• Fluent in English communication.
• Demonstrates technical proficiency with state-of-the-art verification methodologies.

Responsibilities

• Contribute to verification in complex projects.
• Mentor junior verification engineers.
• Coordinate verification activities for projects.

Skills

UVM methodology

VHDL

Verilog

C

C++

SystemVerilog

Education

Degree in Electronics Engineering or similar

Tools

XA/VCS

AMS-Designer

Job description

Infineon Technologies AG in Singapore is seeking a verification engineer to contribute to complex projects and mentor junior engineers. The role requires a degree in Electronics Engineering or a related field with substantial experience in UVM methodology.

Key responsibilities involve setting up verification metrics, coordinating activities, and improving verification environments while promoting a culture of technical excellence within the team. Proficient knowledge of verification methodologies and fluent English communication skills are essential.