Senior Emulation Architect for FPGA & SoC Prototyping

MaxLinear; Singapore; Presencial; SGD 180 000 - 240 000; Tempo integral

Resumo da oferta

MaxLinear is seeking a highly motivated Senior Staff Emulation Development Engineer to join our engineering team in Singapore. You will drive emulation/FPGA models from RTL designs, and collaborate with architects, RTL designers, verification, software, and validation teams globally to solve complex problems and accelerate product readiness.

You will work with state‑of‑the‑art emulation hardware (HAPS‑80, Palladium) and develop tools that enhance RTL validation, pre/post-silicon validation, and

Qualificações

• Bachelor's or Master's degree in Electrical & Electronics/Computer Engineering.
• 8+ years of experience in digital design/verification, emulation/FPGA prototyping, and system validation.
• Strong knowledge of RTL languages (Verilog/VHDL) and emulation tools.
• Experience mapping complex SoC designs to multi-FPGA platforms (e.g., HAPS-80, Palladium).
• Hands-on silicon verification, test plan development, and lab equipment usage.
• Team player with proactive, self-motivated attitude.

Responsabilidades

• Create emulation/FPGA models from RTL design using emulation/FPGA synthesis and routing tools.
• Define RTL changes required for emulation/FPGA and develop hardware/software collaterals.
• Test and debug the emulation/FPGA model and enable acceleration of RTL validation and SW development.
• Improve usability by RTL validation and debugging of failing RTL tests on the emulation platform.
• Develop automation aids, flows and scripts to improve emulation efficiency and equipment utilization.

Conhecimentos

RTL languages

Emulation/FPGA prototyping

Verilog/VHDL

System validation

Formação académica

Bachelor's or Master's in Electrical & Electronics/Computer Engineering

Ferramentas

HAPS-80

Palladium

FPGA prototyping boards

Descrição da oferta de emprego

MaxLinear is seeking a highly motivated Senior Staff Emulation Development Engineer to join our engineering team in Singapore. You will drive emulation/FPGA models from RTL designs, and collaborate with architects, RTL designers, verification, software, and validation teams globally to solve complex problems and accelerate product readiness.

You will work with state‑of‑the‑art emulation hardware (HAPS‑80, Palladium) and develop tools that enhance RTL validation, pre/post-silicon validation, and