Senior DTCO Logic Designer - Standard Cell & PPA Expert

Brightecs Innovation Pte Ltd; Singapore; On-site; SGD 120,000 - 150,000; Full time

Job summary

Brightecs Innovation Pte. Ltd. (BIP) is seeking a highly skilled engineer to define a CMOS standard cell library and optimize it for design-technology-co-optimization (DTCO) in Singapore.

You will integrate process, circuit simulation, and place-and-route analysis to ensure competitiveness across technology generations. This role requires a Master’s degree in Microelectronics or related fields, strong experience in semiconductor device simulation, DTCO, and verification, and proficiency with

Qualifications

• Master's degree or above in a relevant field.
• Majors include Microelectronics and Integrated Circuits, Electrical Engineering, Physics.
• Engage in semiconductor device simulation, DTCO, and design verification.
• Familiar with logic platform DTCO process methodologies.
• Familiar with advanced device processes.
• Familiar with semiconductor technology development processes and PDK.
• Proficient in using layout and simulation tools.

Responsibilities

• Define a standard cell library for CMOS processes and optimize it for DTCO by combining process, circuit simulation, and place-and-route analysis.
• Design Testkeys to characterize the standard cell library PPAs and provide feedback to the process and model.
• Collaborate with the design team on digital logic module design and optimize it for DTCO.

Skills

Semiconductor device simulation

DTCO knowledge

Design verification

Team collaboration

Education

Master's degree or above in Microelectronics and Integrated Circuits / Electrical Engineering / Physics

Major: Microelectronics and Integrated Circuits, Electrical Engineering, Physics

Tools

Layout tools

Simulation tools

EDA tools

Job description

Brightecs Innovation Pte. Ltd. (BIP) is seeking a highly skilled engineer to define a CMOS standard cell library and optimize it for design-technology-co-optimization (DTCO) in Singapore.

You will integrate process, circuit simulation, and place-and-route analysis to ensure competitiveness across technology generations. This role requires a Master’s degree in Microelectronics or related fields, strong experience in semiconductor device simulation, DTCO, and verification, and proficiency with