Senior DFT Architect: Drive Testability & Yield

Broadcom Inc.; Singapore; On-site; SGD 180,000 - 260,000; Full time

Benefits offered by this job

Competitive compensation

Health & wellness initiatives

Professional development opportunities

Flexible working arrangements

Equal opportunities employer

Job summary

Broadcom Inc. is seeking a Senior/Staff DFT Engineer in Singapore to lead design-for-test initiatives across our semiconductor portfolio. You will drive testability, manufacturability, and quality for IC designs, while guiding cross-functional teams and mentoring junior engineers.

The role emphasizes advanced DFT strategies, tool evaluation, and collaboration with design, verification, and manufacturing partners to optimize yield and reliability.

Qualifications

• Bachelor’s degree in Electrical Engineering or Electronics Engineering.
• 10+ years of experience in DFT engineering, semiconductor design, or test engineering.
• Proven expertise in scan-based test, BIST, and test compression.
• Experience with DFT tools such as Synopsys DFT Compiler, Cadence Genus.
• HDL experience with Verilog or VHDL.
• Strong fault models, fault simulation, and ATPG knowledge.
• Demonstrated leadership and mentoring abilities.

Responsibilities

• Develop and implement comprehensive DFT strategies for semiconductor designs.
• Lead cross-functional collaboration to ensure DFT requirements are met.
• Design and optimise test structures, patterns, and data management.
• Mentor junior engineers and design teams.
• Evaluate and integrate new DFT tools and technologies.
• Conduct DFT reviews and audits early in the design cycle.
• Document DFT specifications and test procedures.
• Contribute to continuous improvement of DFT processes.

Skills

Leadership

Mentoring

Analytical

Communication

Education

Bachelor's degree in Electrical/Electronics

Master's degree preferred

Tools

Synopsys DFT Compiler

Cadence Genus

Job description

Broadcom Inc. is seeking a Senior/Staff DFT Engineer in Singapore to lead design-for-test initiatives across our semiconductor portfolio. You will drive testability, manufacturability, and quality for IC designs, while guiding cross-functional teams and mentoring junior engineers.

The role emphasizes advanced DFT strategies, tool evaluation, and collaboration with design, verification, and manufacturing partners to optimize yield and reliability.