RTL/SerDes Design Engineer - DFT & Timing Closure

CURIOUS TEK PTE. LTD.; Singapore; On-site; SGD 120,000 - 180,000; Full time

Job summary

CURIOUS TEK PTE. LTD. seeks an experienced Senior IC Design Engineer to advance SerDes IP products. You will handle Verilog/VHDL RTL design, logic synthesis, and DFT/ATPG, coordinating with physical and RTL teams to meet timing goals.

Ideal candidates have 5+ years of digital IC design, tape-out experience, and familiarity with Cadence or Synopsys tools, along with strong communication and teamwork skills.

Qualifications

• Degree or higher in Electrical/Electronic Engineering or related field.
• 5+ years of experience in digital IC design.
• Experience from design to tape-out is essential.
• Proficient in Verilog HDL and VHDL RTL design, L/S, DFT, ATPG, Timing Closure.
• Experience using Cadence or Synopsys tools.

Responsibilities

• Perform IC design development of SerDes IP products.
• Perform Logic Synthesis, Static Timing Analysis.
• Lead DFT related activities - Scan Insertion, ATPG, Pattern Validation.
• Work with Physical designer and RTL designer to achieve timing closure.
• Work with test team in debugging production test issues.
• Help debug & correct any functional issues found in taped-out devices.
• Participate in design reviews, support ISO processes and documentation.
• Work closely with customer’s Systems and Software engineers on FPGA verification.

Skills

Digital IC design

Verilog HDL

VHDL RTL design

Timing closure

DFT/ATPG

EDA tools

Communication

Education

Degree/Master in Electrical Electronic Engineering

Tools

Cadence

Synopsys

Job description

CURIOUS TEK PTE. LTD. seeks an experienced Senior IC Design Engineer to advance SerDes IP products. You will handle Verilog/VHDL RTL design, logic synthesis, and DFT/ATPG, coordinating with physical and RTL teams to meet timing goals.

Ideal candidates have 5+ years of digital IC design, tape-out experience, and familiarity with Cadence or Synopsys tools, along with strong communication and teamwork skills.