Principal / Senior IC Verification Engineer

Search Staffing Pte Ltd; Singapore; On-site; SGD 90,000 - 130,000; Full time

Job summary

Search Staffing Pte Ltd client in Singapore seeks a Principal / Senior IC Verification Engineer to lead verification of complex IPs/SoCs for automotive AI platforms. You will architect reusable testbenches, implement verification plans and ensure functional coverage.

Requirements include a Bachelor's/Master's in a related field, strong SystemVerilog/UVM skills, and hands-on experience with VCS, Xcelium, and Questa. Programming in C/C++, Python, Perl, and TCL is a plus.

Qualifications

• Bachelor's or Master's degree required in a relevant engineering field.
• Solid experience in functional verification of ASICs/SoCs.
• Strong SystemVerilog and UVM proficiency.
• Hands-on with verification tools/simulators (VCS, Xcelium, Questa).

Responsibilities

• Lead functional verification of complex IPs and SoCs.
• Architect and build reusable testbenches and verification environments using UVM.
• Develop verification plans, functional coverage, and assertion checks.
• Debug simulation results and collaborate closely with design teams.
• Automate verification flows and regressions via scripting.
• Support emulation and FPGA prototyping efforts.

Skills

SystemVerilog

UVM

C/C++

Python

Perl

TCL

Formal verification

Debugging

Education

Bachelor's or Master's in Electrical/Electronics Engineering, Computer Science, or related field

Tools

VCS

Xcelium

Questa

Job description

Principal / Senior IC Verification Engineer

Our client, a Singapore-based automotive tech company building AI-powered computing platforms for software-defined vehicles, is looking for an experienced IC Verification Engineer to join their growing chip development team. They specialize in intelligent cockpit systems and autonomous driving computation, combining custom automotive SoCs with advanced software.

What you'll do:

• Lead functional verification of complex IPs and SoCs
• Architect and build reusable testbenches and verification environments using UVM
• Develop verification plans, functional coverage, and assertion checks
• Debug simulation results and collaborate closely with design teams
• Automate verification flows and regressions via scripting
• Support emulation and FPGA prototyping efforts

What you'll bring:

• Bachelor's or Master's in Electrical/Electronics Engineering, Computer Science, or related field
• Solid experience in functional verification of ASICs/SoCs
• Strong SystemVerilog and UVM proficiency
• Hands-on with verification tools/simulators (VCS, Xcelium, Questa)
• Programming/scripting skills (C/C++, Python, Perl, TCL)
• Bonus: formal verification knowledge, emulation/FPGA prototyping exposure

EA PersonnelRegistration No: R1106329

EA License No:12C6254