Principal / Lead Principal Engineer - Analog Design

RECRUITMATIC PTE. LTD.; Singapore; On-site; SGD 180,000 - 250,000; Full time

Job summary

RECRUITMATIC PTE. LTD. is seeking a highly skilled analog/mixed-signal design leader to drive the development of automotive Ethernet ICs in Singapore.

You will lead architecture, design, verification, and layout planning while mentoring a high-performance team from concept to production. The role requires a PhD or advanced degree with extensive hands-on silicon experience in high-speed analog circuits, ADC/DAC, PLLs, and clocking, with strong communication skills to collaborate with

Qualifications

• PhD with 4+ years in relevant field, or MS EE with 7+ years, or Bachelor's with 10 years
• Experience leading high-performance analog design teams from concept to production
• Solid fundamentals in analog, linear circuit design, high-speed design
• Experience in data converters (ADC/DAC), amplifiers, filters, references, regulators, PLLs and clocking circuits with working silicon
• FinFET technology nodes preferred
• Clear communication and presentation skills

Responsibilities

• Design and verify high-performance analog, mixed-signal ICs for Automotive Ethernet products
• Research and develop circuit solutions including architecture, design, simulation, modelling, layout planning and supervision
• Recruit and lead high performance analog design team
• Perform lab characterisation and silicon debug
• Conduct design reviews and document work products
• Communicate with cross-functional teams to support all aspects of the product

Skills

Analog design leadership

High-speed design

Data converters (ADC/DAC)

Linear circuit design

PLL & clocking

Silicon debugging

FinFET tech

Education

PhD with 4+ years

MS EE with 7+ years

Bachelors with 10+ years

Job description

Your Role

• Design and verify high-performance analog, mixed signal ICs for Automotive Ethernet products.
• Research and develop circuit solutions including architecture, design, simulation, modelling, layout planning and supervision
• Recruit and lead high performance analog design team
• Perform lab characterisation and silicon debug
• Conduct design reviews and document work products
• Communicate with cross-functional teams to support all aspects of the product

Your Profile

• Minimum PhD with 4+ years of relevant experience, or MS EE with more than 7 years of experience, or Bachelors with 10 years of experience
• Experience leading high performance analog design team from concept to production
• Solid fundamentals in analog, linear circuit design, high-speed design
• Experience in multiple areas of design of data converters (ADC/DAC), amplifiers, filters, references, regulators, PLLs and clocking circuits, and high linearity transmit drivers, with demonstrated working silicon
• Design experience in FinFet technology nodes is preferred
• Clarity in communication and presentation.