Principal Engineer, NAND Advanced Thin Films Process Development

1100 Micron SemiAsiaOP Pte Ltd; Singapore; On-site; SGD 100,000 - 140,000; Full time

Job summary

1100 Micron SemiAsiaOP Pte Ltd in Singapore is seeking a Principal Engineer for Process Development in Advanced Thin Film. This leader will define technical strategies and oversee film process integration for NAND memory technology. Required qualifications include a PhD and extensive experience in thin film processes.

The role emphasizes fostering innovation, leading cross-functional teams, and ensuring successful manufacturing transitions. The company values diversity and encourages all qualified applicants to apply.

Qualifications

• PhD or equivalent degree in Materials Science, Chemical Engineering, Physics, Chemistry, or Electrical Engineering.
• 5-10 years of thin film research and development experience focusing on NAND processes.

Responsibilities

• Define and implement the technical strategy for film process development.
• Lead the development and integration of thin film processes.
• Oversee development of process modules for manufacturability.

Skills

Thin film deposition processes

Process design and optimization

Statistical process control

Data analytics for process optimization

Cross-functional team leadership

Education

PhD in Materials Science or related field

Tools

X-ray Reflectivity (XRR)

Scanning Electron Microscopy (SEM)

Chemical Vapor Deposition (CVD)

Job description

Position Overview

The Principal Engineer in Process Development – Advance Thin film plays a critical leadership role in the strategic advancement and implementation of sophisticated structural and electrical film processes for NAND memory technology. This position is responsible for defining technical direction, fostering innovation, and ensuring the successful integration of new processes into manufacturing. The Principal Engineer works collaboratively across multiple teams, contributes to the establishment of technology roadmaps, and delivers solutions that drive next‑generation device scaling while supporting the organization’s objectives.

Key Responsibilities

• Define and implement the technical strategy for structural and electrical film process development, ensuring alignment with both business and technology objectives.
• Lead multi‑functional teams in the development, integration, and scaling of thin film processes specifically tailored for advanced NAND structures and devices.
• Oversee the end‑to‑end development of process modules, with a strong focus on manufacturability, scalability, and readiness for integration.
• Resolve complex technical challenges that have significant business implications, including root cause analysis and mitigation of process/device failures.
• Mentor senior engineers and influence the technical direction throughout the organization, fostering a culture of technical excellence and innovation.
• Represent the function in technical forums and participate in strategic collaborations, including industry consortia, technical conferences, and joint development projects.
• Deliver solutions that enable and maintain a competitive leadership position in advanced memory technology, including benchmarking against industry standards.
• Drive technology transfer and ramp‑up activities, ensuring seamless transition from R&D to high‑volume manufacturing.
• Identify and evaluate emerging trends, risks, and opportunities in structural and electric film technology, providing recommendations for future investments and critical initiatives.
• Lead cost reduction, yield improvement, and reliability enhancement programs through innovative process and material utilization.

Technical Expertise

• Demonstrated mastery of thin film deposition processes, including Atomic Layer Deposition and Chemical Vapor Deposition, encompassing process design, optimization, and integration for high‑density NAND applications.
• In‑depth knowledge of process‑device and mechanical interactions, challenges associated with technology/device scaling, and principles of reliability engineering for next‑generation memory nodes.
• Proven track record of developing and implementing novel chemistries, materials, and hardware solutions, such as chamber design, plasma source optimization, and gas delivery systems.
• Expertise in advanced characterization techniques, including X‑ray Reflectivity (XRR), ellipsometry, Scanning Electron Microscopy (SEM), Transmission Electron Microscopy (TEM), Secondary Ion Mass Spectrometry (SIMS), and X‑ray Photoelectron Spectroscopy (XPS), as well as electrical evaluation methods (leakage, impedance, capacitance, and breakdown analysis).
• Strong foundation in thin film process development using plasma and thermal methods, especially for dielectric (including low‑K and high‑K films) and carbon‑based films, with an ability to analyze structural‑process correlations and conduct failure analysis.
• Experience in benchmarking technology, conducting competitive analyses, and assessing industry trends, translating complex data into actionable technology roadmaps and process improvements.
• Ability to lead cross‑disciplinary teams in the development and deployment of new process technologies, collaborating with integration, device, reliability, and manufacturing engineering groups.
• Proficiency in statistical process control (SPC), design of experiments (DOE), and data analytics for process optimization and troubleshooting.
• Experience with regulatory compliance, intellectual property management, and technical documentation in a semiconductor manufacturing environment.

Qualifications

• PhD or equivalent degree in Materials Science, Chemical Engineering, Physics, Chemistry, Electrical Engineering, or a related field.
• 5-10 years of experience in thin film research and development for NAND process, specifically including CVD and diffusion thin films.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.