Principal Engineer/Mts, Fecos Cpie Device

MICRON SEMICONDUCTOR ASIA OPERATIONS PTE. LTD.; Singapore; On-site; SGD 90,000 - 150,000; Full time

Job summary

Micron Semiconductor Asia Operations Pte. Ltd. is seeking a seasoned engineer to drive technology ramps in high-volume CMOS and memory production.

The ideal candidate will apply data analysis to reduce variability, collaborate across functions to optimize designs and tests, and lead process improvements to boost manufacturability and performance. Applicants should have 5+ years in wafer fab or process integration, with preference for FinFET/GAA CMOS experience, strong semiconductor physics

Qualifications

• Minimum 5 years of relevant experience.
• Master's or PhD in Physics or Engineering preferred.
• Experience in wafer fab process or process integration engineering.
• Direct experience in advanced CMOS device technology such as FinFET or GAA preferred.
• Knowledge of semiconductor physics and transistor operation.
• Understanding of wafer fabrication process areas, tool sets and tuning knobs.
• Programming capability such as Python is a plus.
• Occasional international travel is required.

Responsibilities

• Enable technology ramp in high-volume production for CMOS and memory devices.
• Improve device performance with a focus on variability reduction and robustness.
• Support and execute design and test optimisation to enhance manufacturability and performance.
• Identify and implement process simplification and working methodology improvements.
• Lead or actively contribute to cross-functional problem-solving for device, yield, and quality issues.

Skills

Data analysis

Python

MS Office

Problem solving

Teamwork

Education

Master's or PhD in Physics or Engineering

Tools

JMP

Spotfire

Job description

Job Responsibilities

• Enable technology ramp in high-volume production for CMOS and memory devices.
• Improve device performance with a focus on variability reduction and robustness.
• Support and execute design and test optimisation to enhance manufacturability and performance.
• Identify and implement process simplification and working methodology improvements.
• Lead or actively contribute to cross-functional problem-solving for device, yield, and quality issues.

Job Requirements

• Minimum 5 years of relevant working experience is required. A master's or Ph.D. degree in Physics or Engineering areas is preferred.
• Working experience in wafer fab process or process integration engineering. Direct experience in advanced CMOS device technology such as FinFET or GAA is preferable.
• Proven knowledge in semiconductor physics and understanding of transistor operations, scaling limitations and reliability, basic knowledge of CMOS circuits and characterisation methods.
• Understanding of wafer fabrication process areas, including tool sets, process mechanisms, tuning knobs, etc.
• Excellent data analysis skills using software (JMP, SPOTFIRE, etc).
• Strong task ownership, self-motivated to work with other team members to make progress collaboratively.
• Open-minded attitude to learn new skills and could adapt to a new working environment swiftly.
• Good digital literacy with MS Office. Programming capability such as Python is a plus.
• Occasional international business travel is required for this position.